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### ISP1581_w: 一款符合USB 2.0规范的高度优化接口设备 #### 一、概述 ISP1581是一款成本优化且功能优化的通用串行总线（Universal Serial Bus, USB）接口设备，完全符合USB 2.0规范（Rev.2.0）。它为基于微控制器或微处理器的系统提供了高速USB通信能力，并通过一个高速通用并行接口与系统的微控制器/处理器进行通信。 #### 二、产品特点 ##### 1. 全面支持USB 2.0标准 - **兼容性**：该设备支持自动检测USB 2.0系统的操作，并能在全速条件下保持运行，即使在USB 1.1回退模式下也能正常工作。 - **适应性广泛**：作为一款通用型USB接口设备，ISP1581能够适用于各种现有的设备类别，包括成像类、大容量存储设备、通信设备、打印设备及人机界面设备等。 ##### 2. 内置的通用DMA模块 - **易于集成**：内部的通用直接内存访问（Direct Memory Access, DMA）模块使得ISP1581可以轻松集成到数据流应用中。 - **高度定制化**：针对不同应用场景，DMA模块有多种配置选项，尤其适合大容量存储应用。 ##### 3. 灵活的系统设计选择 - **模块化设计**：采用模块化的设计方法，使得设计者可以从广泛可用的微控制器中选择最合适的型号。 - **节省开发成本**：可以重用现有架构和固件投资，从而缩短开发时间，消除风险，降低成本。 - **快速高效地开发**：这些特性共同作用，使得ISP1581成为开发成本效益最高的USB外设解决方案的理想选择。 ##### 4. 低功耗特性 - **节能模式**：在“挂起”模式下，设备具有较低的功率消耗，便于设计符合ACPI™、OnNow™以及USB电源管理要求的产品。 ##### 5. 高级功能 - **软连接（SoftConnect™）**：此功能有助于实现显著的成本节约，并简化高级USB功能在PC外设中的实施。 - **频率降低的晶体振荡器**：采用频率较低的晶体振荡器进一步降低了成本。 - **集成终端电阻**：集成的终端电阻减少了外部组件的需求，降低了设计复杂度。 #### 三、适用范围 ISP1581特别适合用于各种类型的外设，例如： - 打印机 - 扫描仪 - 磁光（MO）、光盘（CD）、数字视频光盘（DVD）和Zip®/Jaz®驱动器 - 数码相机 - USB到以太网链接 - 电缆调制解调器和DSL调制解调器 #### 四、总结 ISP1581是一款高度优化的USB 2.0接口设备，具备全面的功能支持和灵活性。无论是对于开发者还是终端用户而言，ISP1581都能提供卓越的性能表现和高效的解决方案，特别是在低功耗、成本控制和快速开发方面具有明显优势。

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ISP1581

Universal Serial Bus 2.0 high-speed interface device

Rev. 02 — 23 October 2000 Objective speciﬁcation

1. General description

The ISP1581 is a cost-optimized and feature-optimized Universal Serial Bus (USB)

interface device, which fully complies with the

Universal Serial Bus Speciﬁcation

Rev. 2.0

. It provides high-speed USB communication capacity to systems based on a

microcontroller or microprocessor. The ISP1581 communicates with the system’s

microcontroller/processor through a high-speed general-purpose parallel interface.

The ISP1581 supports automatic detection of USB 2.0 system operation. The

USB 1.1 fall-back mode allows the device to remain operational under full-speed

conditions. It is designed as a generic USB interface device so that it can ﬁt into all

existing device classes, such as: Imaging Class, Mass Storage Devices,

Communication Devices, Printing Devices and Human Interface Devices.

The internal generic DMA block allows easy integration into data streaming

applications. In addition, the various conﬁgurations of the DMA block are tailored for

mass storage applications.

The modular approach to implementing a USB interface device allows the designer to

select the optimum system microcontroller from the wide variety available. The ability

to re-use existing architecture and ﬁrmware investments shortens the development

time, eliminates risk and reduces costs. The result is fast and efﬁcient development of

the most cost-effective USB peripheral solution.

The ISP1581 is ideally suited for many types of peripherals, such as: printers;

scanners; magneto-optical (MO), compact disc (CD), digital video disc (DVD) and

Zip

/Jaz

drives; digital still cameras; USB-to-Ethernet links; cable and DSL

modems. The low power consumption during ‘suspend’ mode allows easy design of

equipment that is compliant to the ACPI™, OnNow™ and USB power management

requirements.

The ISP1581 also incorporates features such as SoftConnect™, a reduced

frequency crystal oscillator and integrated termination resistors. These features allow

signiﬁcant cost savings in system design and easy implementation of advanced USB

functionality into PC peripherals.

Philips Semiconductors

ISP1581

USB 2.0 HS interface device

Objective speciﬁcation Rev. 02 — 23 October 2000 2 of 73

9397 750 07648

2. Features

■ Complies fully with Universal Serial Bus Speciﬁcation Rev. 2.0

■ Complies with most Device Class speciﬁcations

■ High performance USB interface device with integrated Serial Interface Engine

(SIE), FIFO memory, data transceiver and 3.3 V voltage regulators

■ Supports automatic USB 2.0 mode detection and USB 1.1 fall-back mode

■ High speed DMA interface

■ Fully autonomous and multi-conﬁguration DMA operation

■ Up to 14 programmable USB endpoints with 2 ﬁxed control IN/OUT endpoints

■ Integrated physical 8 kbyte of multi-conﬁguration FIFO memory

■ Endpoints with double buffering to increase throughput and ease real-time data

transfer

■ Bus independent interface with most microcontroller/microprocessors

(16 Mbytes/s or 16 Mwords/s)

■ Bus-powered capability with low power consumption and low ‘suspend’ current

■ 12 MHz crystal oscillator with integrated PLL for low EMI

■ Software controlled connection to the USB bus (SoftConnect™)

■ Complies with the ACPI™, OnNow™ and USB power management requirements

■ Internal power-on and low-voltage reset circuit, also supporting a software reset

■ Operation over the extended USB bus voltage range (4.0 to 5.5 V) with 5 V

tolerant I/O pads

■ Operating temperature range −40 to +85 °C

■ 12 kV in-circuit ESD protection on human accessible pins such as D+ and D−

■ Full-scan design with high fault coverage (>99%)

■ Available in LQFP64 package.

3. Applications

■ Personal digital assistant (PDA)

■ Mass storage device, e.g., Zip

, Jaz

, MO, CD, DVD drive

■ Digital camera

■ Communication device, e.g. router, modem

■ Printer

■ Scanner.

4. Ordering information

Table 1: Ordering information

Type number Package

Name Description Version

ISP1581BD LQFP64 Plastic low proﬁle quad ﬂat package; 64 leads; body 10 x 10 x 1.4 mm SOT314-2

Philips Semiconductors

ISP1581

USB 2.0 HS interface device

Objective speciﬁcation Rev. 02 — 23 October 2000 5 of 73

9397 750 07648

6.2 Pin description

Table 2: Pin description for LQFP64

Symbol

[1]

Pin Type

[2]

Description

DGND 1 - digital ground

CC(5.0)

2 - supply voltage (3.3 or 5.0 V)

AGND 3 - analog ground

reg(3.3)

5 - regulated supply voltage (3.3 V ± 10%) from internal

regulator; supplies internal analog circuits; used to connect

decoupling capacitor and 1.5 kΩ pull-up resistor on D+ line

Remark: Cannot be used to supply external devices.

D− 5 AI/O USB D− connection (analog)

D+ 6 AI/O USB D+ connection (analog)

RPU 7 AI connection for external pull-up resistor for USB D+ line;

must be connected to V

reg(3.3)

via a 1.5 kΩ resistor

RREF 8 AI connection for external bias resistor; must be connected to

ground via a 12.2 kΩ (± 0.1%) resistor

MODE1 9 I selects function of pin ALE/A0 (in Split Bus mode only):

0 — ALE function (address latch enable)

1 — A0 function (address/data indicator).

Remark: Connect to V

CC(5.0)

in Generic Processor mode.

RESET 10 I reset input (Schmitt trigger); a LOW level produces an

asynchronous reset; connect to V

for power-on reset

(internal POR circuit)

EOT 11 I End Of Transfer input (programmable polarity, see

Tabl e 37); used in DMA slave mode only

DREQ 12 I/O DMA request (programmable polarity); direction depends

on the bit MASTER in the DMA Hardware register (DMA

master: input, DMA slave: output); see Table 3 7

DACK 13 I/O DMA acknowledge (programmable polarity); direction of

depends on bit MASTER in the DMA Hardware register

(DMA slave: input, DMA master: output); see Table 37

DIOR 14 I/O DMA read strobe (programmable polarity); direction

depends on bit MASTER in the DMA Hardware register

(DMA slave: input, DMA master: output); see Table 37

DIOW 15 I/O DMA write strobe (programmable polarity); direction

depends on bit MASTER in the DMA Hardware register

(DMA slave: input, DMA master: output); see Table 37

INTRQ 16 I interrupt request input from ATA/ATAPI peripheral

CS1 17 O chip select output for ATAPI device

CS0 18 O chip select output for ATAPI device

BUS_CONF/

DA0

19 I/O during power-up: input to select the bus conﬁguration

0 — Split Bus mode; multiplexed 8-bit address/data bus on

AD[7:0], separate 8/16-bit DMA data bus on DATA[15:0]

1 — Generic Processor mode; separate 8-bit address on

AD[7:0], 16-bit DMA data bus on DATA[15:0].

normal operation: address output to select the task ﬁle

剩余72页未读，继续阅读

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