【免费】TOSHIBA东芝TB6605FTG-datasheet产品规格书.pdf资源-CSDN文库

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TB6605FTG

5 6 7 8

19 20 21

23 24 25 26 27

HA+

HA-

HB+

HB-

HC+

HC-

CLd

OSC_C

OSC_R

Dif_in

TCR

Vreg

CW/CCW

BRAKE

PWM_in

START

Soft-C

CP2

OVP

CP1

CP3

VCC

GND

Idc

LA(U)

OUT-A

LA(L)

LB(U)

OUT-B

LB(L)

LC(U)

OUT-C

LC(L)

TOSHIBA Bi-CMOS Integrated Circuit Silicon Monolithic

TB6605FTG

3-phase Full-wave Sine-wave Brushless Motor Controller

TB6605FTG is a 3-phase full-wave sine-wave PWM brushless motor

control IC.东芝代理，大量现货：QQ 990123167 13610068393

Sine-wave PWM driving with 2-phase modulation enables driving

in high efficiency and low noise condition.

Features

• Sine-wave PWM driving system

• 2-phase modulation system with low switching loss

• Upper Nch – Lower Nch FET

• Dead time function included

• Brake function included

• Start function included

• Speed command: PWM input type

• Auto lead-angle control function included

(Lead angle is set based on the speed)

• CW/CCW function included

• Lock protection function included

• Output signal of hall pulse monitor included

Weight: 0.08 g (typ.)

P-VQFN36-0505-0.50-001

This

product has a MOS structure and is sensitive to electrostatic discharge. When handling this product, ensure that the

environment is protected against electrostatic discharge by

using an earth strap, a conductive mat and an ionizer. Ensure

also that the ambient temperature and relative humidity are maintained at reasonable levels.

The IC should be installed correctly. Otherwise, the IC or peripheral parts and devices may be degra

ded or permanently

damaged.

1 / 24

TB6605FTG

1.1.2. Pin Description

No. Name Description Note

1 HA+ Hall signal (Phase-A +) input Hall element (Phase-A) signal + input

2 HA- Hall signal (Phase-A -) input Hall element (Phase-A) signal - input

3 HB+ Hall signal (Phase-B +) input Hall element (Phase-B) signal + input

4 HB- Hall signal (Phase-B -) input Hall element (Phase-B) signal - input

5 HC+ Hall signal (Phase-C +) input Hall element (Phase-C) signal + input

6 HC- Hall signal (Phase-C -) input Hall element (Phase-C) signal - input

7 CLd Lock protection circuit setting pin Voltage input

8 OSC_C Internal reference clock setting C connecting External capacitor between GND and OSC_C.

9 OSC_R Internal reference clock setting R connecting External resistor between GND and OSC_R.

10 Dif_in Speed feedback input -

11 LA Lead angle setting voltage input Input lead angle ADC

12 FV Smoothing pin of MMV output External capacitor

13 TCR CR pin of MMV External resistor and capacitor

14 HP Output signal of hall pulse monitor HA monitor of signal after it makes it to binary

15 Vreg 5V Power voltage source Connecting capacitor to GND against 5 V output

16 CW/CCW CW/CCW switching pin H: Reverse/L: Forward, Pull up resistor of 50 kΩ (typ.)

17 BRAKE Brake signal input L: Brake (All phases of lower side:

ON), Pull up resistor of

50 kΩ (typ.)

18 PWM_in PWM signal input for speed command Pull up resistor of 50 kΩ (typ.)

19 START Start signal input L: Start, H: Stop, Pull up resistor of 50 kΩ (typ.)

20 Soft-C Capacitor pin for soft start External capacitor

21 CP2 Charge pump 2 For upper side Nch FET gate voltage

22 OVP Switching pin for avoiding voltage booster Pull up resistor of 50 kΩ (typ.)

TEST pin is held concurrently,

TEST mode: Vref + 0.7 V (= 5.7 V) or more

23 CP1 Charge pump 1 For upper side Nch FET gate voltage

24 CP3 Charge pump 3 For upper side Nch FET gate voltage

25 VCC Logic Supply voltage pin V

(opr.) = 9 to 28 V

26 GND Ground pin -

27 Idc Output current detection signal input pin Into gate block function when over 0.25 V (typ.)

28 LA (U) Phase-A driving signal output (U) Phase-A output FET gate (for upper-side Nch)

29 OUT-A Phase-A motor pin -

30 LA (L) Phase-A driving signal output (L) Phase-A output FET gate (for lower-side Nch)

31 LB (U) Phase-B driving signal output (U) Phase-B output FET gate (for upper-side Nch)

32 OUT-B Phase-B motor pin -

33 LB (L) Phase-B driving signal output (L) Phase-B output FET gate (for lower-side Nch)

34 LC (U) Phase-C driving signal output (U) Phase-C output FET gate (for upper-side Nch)

35 OUT-C Phase-C motor pin -

36 LC (L) Phase-C driving signal output (L) Phase-C output FET gate (for lower-side Nch)

** Metal exposed part on the 4 corners and the underside are connected electrically each other.

Although pin assignment is considered to avoid the distraction from pin-pin or pin-metal area shortage, use in the state of the

metal area on 4 corners and underside is opened electrically.

(If connected to ground, there is a possibility for distraction with shortage.)

3 / 24

TB6605FTG

1.1.3. Absolute maximum ratings (Ta = 25°C)

Characteristics Symbol Rating Unit

Supply voltage

30 (Note. 1)

2 32 (Note. 2)

Input voltage V

5.5 (Note. 3)

Vreg (Note. 4)

Output voltage V

OUT

5.5 (Note. 5)

30 (Note. 6)

40 (Note. 7)

Output current I

OUT

10 (Note. 8)

20 (Note. 9)

10 (Note. 10)

2 (Note. 11)

Power dissipation P

1.56 (Note. 12) W

Operation temperature T

opr

−30 to 85 °C

Storage temperature T

stg

−55 to 150 °C

Note 1: Vcc (in normal operation)

Note 2: Vcc (When 8 V charge pump is disabled, without external C for the charge pump)

* In normal operation, absolute maximum rating is Vcc1, as charge pump function is necessary for the operation.

Note. 3: CW/CCW, START, BRAKE, and PWM-in

Note. 4: OVP

Note. 5: HP

Note. 6: OUT-A, OUT-B, and OUT-C

Note. 7: LA (U), LB (U), and LC (U)

Note. 8: LA(U),LB(U),LC(U), LA(L),LB(L), and LC(L) source current

Note. 9: LA(U),LB(U),LC(U), LA(L),LB(L), and LC(L) sink current

Note. 10: Vreg

Note. 11: HP

Note. 12: Mounted on PCB (Glass epoxy 76.2 mm × 114.3 mm × 1.6 mm, Cu area 60 %, single layer)

Absolute maximum rating is the standard without any exception even in a moment.

If the IC is operated in a condition beyond the rating, destruction, degeneration or damaging of IC or external parts possibly

occurs. Design to avoid the condition beyond the rating in any operating condition.

Operate within the condition described in next table “Operating condition”.

1.1.4. Operating condition (Ta = 25°C)

Characteristics Symbol Rating Unit

Supply voltage (Note. 1) V

9 to 28 V

PWM input signal for speed command (PWM_in) (Note. 2) PWM_in 10 to 100 kHz

Internal reference clock frequency (Note. 3) fx 2 to 8 MHz

(Note. 1): OUT-A, OUT-B, and OUT-C pins should be rating voltage (30 V) or less.

(Note. 2): Output PWM frequency does not change depending on PWM-in frequency.

Output PWM is configured depending on the internal reference clock frequency.

(Note. 3): Please configure the external constant number including variation.

4 / 24

TB6605FTG

1.1.5. Description for operation

1. Sine-wave PWM driving

1.1.5.1. < Energization mode switching >

When starting, TB6605FTG operates rectangle driving of 120° energization signal with position detect signal.

After f (frequency every 1 phase of position detect signal (hall element signal)) goes beyond fH (setting frequency), at HA

falling timing next-after IC counts 6 times of hall signal switching edges, the operation mode is switched to 180° energization

mode.

(About Hall input signal, see 8. Hall amplifier circuit.)

The Setting Frequency fH is determined as next.

Setting frequency: fH = fx ÷ (2

× 64 × 6)

The fx is internal reference clock determined with OSC_R and OSC_C.

When fx = 4 MHz, fH = 10.15 Hz,

fx = 5 MHz, fH = 12.7 Hz, and

fx = 6 MHz, fH = 15.25 Hz.

1.1.5.2. (Mode Table)

Rotating state Driving mode

> f Rectangle driving (120° energization)

< f Sinusoidal wave PWM driving (180°energization)

*To avoid malfunction from noise, IC operates in 120° energization mode when f is higher than normal possible frequency.

(When fx = 5 MHz, if over 1 kHz, IC operates in rectangle 120° energization mode.)

The following figure is actually processed digitally with the image chart in the IC.

<180° energization >

●60° modulation-60° reset is operated.

The modulation signal is created from position detect signal. Sinusoidal PWM signal is created from comparing this

modulation wave to triangular wave.

IC counts the time between one zero-cross timing to next zero-cross timing of 3 position detect signals (60° electrical

angle), and use this time as next 60° phase length.

The 60° phase length of the modulation signal is from 32 data, and time length for 1 data is 1/32 of time length of the

previous 60° phase length, so modulation wave advances with this length.

Sine-wave pattern

(modulation signal)

Trianglar wave

(Carrier signal)

Position

estimation

Counter

Internal reference

clock generate

Phase

alignment

( Phase-A,

Phase-B,

Phase-C)

Position signal

Speed control

signal

Comparator

Phase-C

Phase

-B

Phase

-A

(U)

LA (L)

(U)

(L)

(U)

(L)

Internal reference clock

5 / 24

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