UPF Based Power Aware Dynamic Simulation.pdf
注意:只是第五章 UPF based power aware (PA) verifcation adopts several power dissipation reduction techniques based on the target design implementation and UPF power specifcation or intent, as discussed in Chap. 2. These techniques introduce numerous and complex verifcation issues and challenges in the functional and structural aspects of the design. Such artifacts are completely nonexistent in a non-PA verifcation environment. For example, the power aware requirements may affect the design functionality in terms of power On-Off sequences, different modes of power operation, state or data preservation operations, data propagation, logic resolution, power state transitions, power state transition coverage, power state cross coverage, and more.