JETSON TX2 OEM PRODUCT | DESIGN GUIDE | 20170501 1
OEM PRODUCT DESIGN GUIDE
NVIDIA Jetson TX2
Abstract
This document contains recommendations and guidelines for Engineers to follow to create a product that is optimized
to achieve the best performance from the common interfaces supported by the NVIDIA
®
Jetson™ TX2 System-on-
Module (SOM).
Note:
Jetson TX2 utilizes Tegra X2 which is a Parker series SoC.
NVIDIA Jetson TX2 OEM Product Design Guide
JETSON TX2 OEM PRODUCT | DESIGN GUIDE | 20170501 2
Document Change History
Date
Description
MAY, 2017
Initial Release
NVIDIA Jetson TX2 OEM Product Design Guide
JETSON TX2 OEM PRODUCT | DESIGN GUIDE | 20170501 3
Table of Contents
1.0 INTRODUCTION ....................................................................................................................................................................5
1.1 References .......................................................................................................................................................................5
1.2 Abbreviations and Definitions .......................................................................................................................................5
2.0 JETSON TX2 ..........................................................................................................................................................................6
2.1 Overview ..........................................................................................................................................................................6
3.0 POWER ..................................................................................................................................................................................8
3.1 Supply Allocation ............................................................................................................................................................9
3.2 Main Power Sources/Supplies .......................................................................................................................................9
3.3 Power Sequencing ........................................................................................................................................................ 10
3.4 Power Discharge ........................................................................................................................................................... 13
3.5 Power & Voltage Monitoring ........................................................................................................................................ 13
3.6 Deep Sleep Wake Considerations ............................................................................................................................... 15
3.7 Optional Auto-Power-On Support................................................................................................................................ 15
4.0 GENERAL ROUTING GUIDELINES .................................................................................................................................... 17
5.0 USB, PCIE & SATA ............................................................................................................................................................. 19
5.1 USB ................................................................................................................................................................................ 21
5.2 PCIe ................................................................................................................................................................................ 24
5.3 SATA .............................................................................................................................................................................. 28
6.0 GIGABIT ETHERNET .......................................................................................................................................................... 31
7.0 DISPLAY .............................................................................................................................................................................. 33
7.1 MIPI DSI .......................................................................................................................................................................... 33
7.2 eDP / DP / HDMI ............................................................................................................................................................. 36
8.0 MIPI CSI (VIDEO INPUT) ..................................................................................................................................................... 45
9.0 SDIO/SDCARD/EMMC ......................................................................................................................................................... 49
9.1 SD Card .......................................................................................................................................................................... 49
10.0 AUDIO ................................................................................................................................................................................ 52
11.0 WLAN / BT (INTEGRATED) ............................................................................................................................................... 54
12.0 MISCELLANEOUS INTERFACES ..................................................................................................................................... 55
12.1 I2C ................................................................................................................................................................................ 55
12.2 SPI ................................................................................................................................................................................ 57
12.3 UART ............................................................................................................................................................................ 60
12.4 Fan................................................................................................................................................................................ 61
12.5 CAN .............................................................................................................................................................................. 62
12.6 Debug ........................................................................................................................................................................... 63
12.7 Strapping Pins ............................................................................................................................................................. 65
13.0 PADS .................................................................................................................................................................................. 67
13.1 MPIO Pad Behavior when Associated Power Rail is Enabled ................................................................................. 67
13.2 Internal Pull-ups for CZ Type Pins at Power-on ....................................................................................................... 67
13.3 Schmitt Trigger Usage ................................................................................................................................................ 67
13.4 Pins Pulled/Driven High During Power-on ................................................................................................................ 67
13.5 Pad Drive Strength ...................................................................................................................................................... 68
14.0 UNUSED INTERFACE TERMINATIONS ........................................................................................................................... 69
NVIDIA Jetson TX2 OEM Product Design Guide
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14.1 Unused MPIO Interfaces ............................................................................................................................................. 69
14.2 Unused SFIO Interface Pins ....................................................................................................................................... 69
15.0 DESIGN CHECKLIST ........................................................................................................................................................ 70
16.0 APPENDIX A: GENERAL LAYOUT GUIDELINES ........................................................................................................... 77
16.1 Overview ...................................................................................................................................................................... 77
16.2 Via Guidelines ............................................................................................................................................................. 77
16.3 Connecting Vias .......................................................................................................................................................... 78
16.4 Trace Guidelines ......................................................................................................................................................... 78
17.0 APPENDIX B: STACK-UPS .............................................................................................................................................. 80
17.1 Reference Design Stack-Ups ..................................................................................................................................... 80
18.0 APPENDIX C: TRANSMISSION LINE PRIMER ................................................................................................................ 81
18.1 Background ................................................................................................................................................................. 81
18.2 Physical Transmission Line Types ........................................................................................................................... 81
18.3 Driver Characteristics ................................................................................................................................................. 82
18.4 Receiver Characteristics ............................................................................................................................................ 82
18.5 Transmission Lines & Reference Planes .................................................................................................................. 82
19.0 APPENDIX D: DESIGN GUIDELINE GLOSSARY ........................................................................................................... 85
20.0 APPENDIX E: JETSON TX2 PIN DESCRIPTIONS .......................................................................................................... 86
NVIDIA Jetson TX2 OEM Product Design Guide
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1.0 INTRODUCTION
1.1 References
Refer to the documents or models listed in Table 1 for more information. Use the latest revision of all documents at all times.
Table 1. List of Related Documents
Document
Jetson TX2 Module Data Sheet
Parker Series SoC Technical Reference Manual
Jetson TX1/TX2 Developer Kit Carrier Board Specification
Jetson TX2 Module Pinmux
Jetson TX2 Thermal Design Guide
Jetson TX1/TX2 Developer Kit Carrier Board Design Files
Jetson TX1/TX2 Developer Kit Carrier Board BOM
Jetson TX1/TX2 Developer Kit Camera Module Design Files
Jetson TX1/TX2 Supported Component List
1.2 Abbreviations and Definitions
Table 2 lists abbreviations that may be used throughout this document and their definitions.
Table 2. Abbreviations and Definitions
Abbreviation
Definition
BT
Bluetooth
CEC
Consumer Electronic Control
CAN
Controller Area Network
DP
Display Port
eDP
Embedded Display Port
eMMC
Embedded MMC
GPS
Global Positioning System
HDMI
High Definition Multimedia Interface
I2C
Inter IC
I2S
Inter IC Sound Interface
LCD
Liquid Crystal Display
LDO
Low Dropout (voltage regulator)
LPDDR4
Low Power Double Data Rate DRAM, Fourth-generation
PCIe (PEX)
Peripheral Component Interconnect Express interface
PCM
Pulse Code Modulation
PHY
Physical Interface (i.e. USB PHY)
PMC
Power Management Controller
PMIC
Power Management IC
RF
Radio Frequency
RTC
Real Time Clock
SATA
Serial “AT” Attachment interface
SDIO
Secure Digital I/O Interface
SPI
Serial Peripheral Interface
UART
Universal Asynchronous Receiver-Transmitter
USB
Universal Serial Bus
WLAN
Wireless Local Area Network
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