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Proprietary Material - © Cortina Systems Inc. and Cisco Systems, Inc. 2006−2008
Interlaken
Interlaken
Protocol Definition
Revision 1.2
October 7, 2008
Contents
Contents
1.0 Revision History ............................................................................................................................ 6
1.1 Clarifications to Revision 1.1 ................................................................................................ 6
1.2 Changes to Revision 1.0....................................................................................................... 6
2.0 Definitions and Key Variables ...................................................................................................... 8
3.0 Introduction.................................................................................................................................... 9
4.0 Applications ................................................................................................................................. 10
5.0 Interlaken Protocol ...................................................................................................................... 11
5.1 Fundamentals..................................................................................................................... 11
5.2 Basic Concepts................................................................................................................... 11
5.3 Protocol Layer..................................................................................................................... 12
5.3.1 Transmission Format ............................................................................................. 12
5.3.2 Burst Structure....................................................................................................... 13
5.3.2.1 Data Transmission Procedure ............................................................... 13
5.3.2.1.1 Optional Scheduling Enhancement..................................... 14
5.3.2.2 Control Word Format ............................................................................. 15
5.3.3 State Diagrams ...................................................................................................... 18
5.3.4 Flow Control........................................................................................................... 22
5.3.4.1 Protocol.................................................................................................. 22
5.3.4.2 Out-of-Band Flow Control ...................................................................... 23
5.3.4.2.1 Out-of-Band Flow Control Interface Timing......................... 24
5.3.4.3 In-Band Flow Control ............................................................................. 24
5.3.4.4 Full-Packet Mode Flow Control.............................................................. 25
5.3.4.5 Flow Control Extension .......................................................................... 25
5.4 Framing Layer..................................................................................................................... 26
5.4.1 Overview................................................................................................................ 26
5.4.2 64B/67B Encoding ................................................................................................. 26
5.4.3 Meta Frame ........................................................................................................... 29
5.4.4 Synchronous Scrambler ........................................................................................ 30
5.4.5 Lane Alignment...................................................................................................... 32
5.4.6 Lane Diagnostics ................................................................................................... 33
5.4.7 Clock Compensation.............................................................................................. 33
5.4.8 Overhead ............................................................................................................... 35
5.4.9 Skew Budget.......................................................................................................... 36
5.4.10 Rate Matching........................................................................................................ 36
5.4.11 Error Conditions..................................................................................................... 38
5.4.11.1 The Receive SerDes Loses Lock........................................................... 38
5.4.11.2 The Receive Logic Loses Word Boundary Sync.................................... 39
5.4.11.3 Bad Scrambler State.............................................................................. 39
5.4.11.4 Lane Alignment Fails ............................................................................. 39
5.4.11.5 Burst CRC24 Errors ............................................................................... 39
5.4.11.6 Flow Control Errors ................................................................................ 39
5.4.11.7 Unknown Control Word Types ............................................................... 40
5.4.11.8 Bad 64B/67B Codewords....................................................................... 40
5.4.11.9 Diagnostic CRC32 Errors....................................................................... 40
5.4.12 Lane Resiliency ..................................................................................................... 40
5.5 Electrical Specifications ...................................................................................................... 40
5.6 Recommended Statistics .................................................................................................... 40
5.7 Test Patterns ...................................................................................................................... 41