deepin配置无线安装包

/****************************************************************************** * * Copyright(c) 2009-2010 Realtek Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of version 2 of the GNU General Public License as * published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * The full GNU General Public License is included in this distribution in the * file called LICENSE. * * Contact Information: * wlanfae <wlanfae@realtek.com> * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, * Hsinchu 300, Taiwan. * * Larry Finger <Larry.Finger@lwfinger.net> * *****************************************************************************/ #include "../wifi.h" #include "../pci.h" #include "../ps.h" #include "reg.h" #include "def.h" #include "phy.h" #include "rf.h" #include "dm.h" #include "table.h" #include "trx.h" #include "../btcoexist/halbt_precomp.h" #include "hw.h" #include "../efuse.h" #define READ_NEXT_PAIR(array_table, v1, v2, i) \ do { \ i += 2; \ v1 = array_table[i]; \ v2 = array_table[i+1]; \ } while (0) static u32 _rtl8821ae_phy_rf_serial_read(struct ieee80211_hw *hw, enum radio_path rfpath, u32 offset); static void _rtl8821ae_phy_rf_serial_write(struct ieee80211_hw *hw, enum radio_path rfpath, u32 offset, u32 data); static u32 _rtl8821ae_phy_calculate_bit_shift(u32 bitmask); static bool _rtl8821ae_phy_bb8821a_config_parafile(struct ieee80211_hw *hw); /*static bool _rtl8812ae_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);*/ static bool _rtl8821ae_phy_config_mac_with_headerfile(struct ieee80211_hw *hw); static bool _rtl8821ae_phy_config_bb_with_headerfile(struct ieee80211_hw *hw, u8 configtype); static bool _rtl8821ae_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw, u8 configtype); static void phy_init_bb_rf_register_definition(struct ieee80211_hw *hw); static long _rtl8821ae_phy_txpwr_idx_to_dbm(struct ieee80211_hw *hw, enum wireless_mode wirelessmode, u8 txpwridx); static void rtl8821ae_phy_set_rf_on(struct ieee80211_hw *hw); static void rtl8821ae_phy_set_io(struct ieee80211_hw *hw); static void rtl8812ae_fixspur(struct ieee80211_hw *hw, enum ht_channel_width band_width, u8 channel) { struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); /*C cut Item12 ADC FIFO CLOCK*/ if (IS_VENDOR_8812A_C_CUT(rtlhal->version)) { if (band_width == HT_CHANNEL_WIDTH_20_40 && channel == 11) rtl_set_bbreg(hw, RRFMOD, 0xC00, 0x3); /* 0x8AC[11:10] = 2'b11*/ else rtl_set_bbreg(hw, RRFMOD, 0xC00, 0x2); /* 0x8AC[11:10] = 2'b10*/ /* <20120914, Kordan> A workarould to resolve * 2480Mhz spur by setting ADC clock as 160M. (Asked by Binson) */ if (band_width == HT_CHANNEL_WIDTH_20 && (channel == 13 || channel == 14)) { rtl_set_bbreg(hw, RRFMOD, 0x300, 0x3); /*0x8AC[9:8] = 2'b11*/ rtl_set_bbreg(hw, RADC_BUF_CLK, BIT(30), 1); /* 0x8C4[30] = 1*/ } else if (band_width == HT_CHANNEL_WIDTH_20_40 && channel == 11) { rtl_set_bbreg(hw, RADC_BUF_CLK, BIT(30), 1); /*0x8C4[30] = 1*/ } else if (band_width != HT_CHANNEL_WIDTH_80) { rtl_set_bbreg(hw, RRFMOD, 0x300, 0x2); /*0x8AC[9:8] = 2'b10*/ rtl_set_bbreg(hw, RADC_BUF_CLK, BIT(30), 0); /*0x8C4[30] = 0*/ } } else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) { /* <20120914, Kordan> A workarould to resolve * 2480Mhz spur by setting ADC clock as 160M. */ if (band_width == HT_CHANNEL_WIDTH_20 && (channel == 13 || channel == 14)) rtl_set_bbreg(hw, RRFMOD, 0x300, 0x3); /*0x8AC[9:8] = 11*/ else if (channel <= 14) /*2.4G only*/ rtl_set_bbreg(hw, RRFMOD, 0x300, 0x2); /*0x8AC[9:8] = 10*/ } } u32 rtl8821ae_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask) { struct rtl_priv *rtlpriv = rtl_priv(hw); u32 returnvalue, originalvalue, bitshift; RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), bitmask(%#x)\n", regaddr, bitmask); originalvalue = rtl_read_dword(rtlpriv, regaddr); bitshift = _rtl8821ae_phy_calculate_bit_shift(bitmask); returnvalue = (originalvalue & bitmask) >> bitshift; RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "BBR MASK=0x%x Addr[0x%x]=0x%x\n", bitmask, regaddr, originalvalue); return returnvalue; } void rtl8821ae_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask, u32 data) { struct rtl_priv *rtlpriv = rtl_priv(hw); u32 originalvalue, bitshift; RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), bitmask(%#x), data(%#x)\n", regaddr, bitmask, data); if (bitmask != MASKDWORD) { originalvalue = rtl_read_dword(rtlpriv, regaddr); bitshift = _rtl8821ae_phy_calculate_bit_shift(bitmask); data = ((originalvalue & (~bitmask)) | ((data << bitshift) & bitmask)); } rtl_write_dword(rtlpriv, regaddr, data); RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), bitmask(%#x), data(%#x)\n", regaddr, bitmask, data); } u32 rtl8821ae_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath, u32 regaddr, u32 bitmask) { struct rtl_priv *rtlpriv = rtl_priv(hw); u32 original_value, readback_value, bitshift; unsigned long flags; RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), rfpath(%#x), bitmask(%#x)\n", regaddr, rfpath, bitmask); spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags); original_value = _rtl8821ae_phy_rf_serial_read(hw, rfpath, regaddr); bitshift = _rtl8821ae_phy_calculate_bit_shift(bitmask); readback_value = (original_value & bitmask) >> bitshift; spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags); RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), rfpath(%#x), bitmask(%#x), original_value(%#x)\n", regaddr, rfpath, bitmask, original_value); return readback_value; } void rtl8821ae_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath, u32 regaddr, u32 bitmask, u32 data) { struct rtl_priv *rtlpriv = rtl_priv(hw); u32 original_value, bitshift; unsigned long flags; RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n", regaddr, bitmask, data, rfpath); spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags); if (bitmask != RFREG_OFFSET_MASK) { original_value = _rtl8821ae_phy_rf_serial_read(hw, rfpath, regaddr); bitshift = _rtl8821ae_phy_calculate_bit_shift(bitmask); data = ((original_value & (~bitmask)) | (data << bitshift)); } _rtl8821ae_phy_rf_serial_write(hw, rfpath, regaddr, data); spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags); RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n", regaddr, bitmask, data, rfpath); } static u32 _rtl8821ae_phy_rf_serial_read(struct ieee80211_hw *hw, enum radio_path rfpath, u32 offset) { struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); bool is_pi_mode = false; u32 retvalue = 0; /* 2009/06/17 MH We can not execute IO for power save or other accident mode.*/ if (RT_CANNOT_IO(hw)) { pr_err("return all one\n"); return 0xFFFFFFFF; } /* <20120809, Kordan> CCA OFF(when entering), asked by James to avoid reading the wrong value. <20120828, Kordan> Toggling CCA would affect RF 0x0, skip it!*/ if (offset != 0x0 && !((rtlhal->hw_type == HARDWARE_TYPE_RTL8821AE) || (IS_VENDOR_8812A_C_CUT(rtlhal->version)))) rtl_set_bbreg(hw, RCCAONSEC, 0x8, 1); offset &= 0xff; if (rfpath == RF90_PATH_A) is_pi_mode = (bool)rtl_get_bbreg(hw, 0xC00, 0x4); else if (rfpath == RF90_PATH_B) is_pi_mode = (bool)rtl_get_bbreg(hw, 0xE00, 0x4); rtl_set_bbreg(hw, RHSSIREAD_8821AE, 0xff, offset); if ((rtlhal->hw_type == HARDWARE_TYPE_RTL8821AE) || (IS_VENDOR_8812A_C_CU