用maxplus ii实现的四人智能抢答计时器

Debug for fit_fastio_pin_reassign program (iteration 1): I/O delay matrix:- Comb Reg SU Pin Cout Casc Clk N/A 33 N/A 77 N/A N/A Clr N/A 21 N/A 65 N/A N/A Pre N/A 26 N/A 70 N/A N/A Ena N/A N/A 13 N/A N/A N/A Ald N/A 26 N/A 70 N/A N/A OE N/A N/A N/A 61 N/A N/A Cin N/A N/A N/A N/A N/A N/A Casc N/A N/A N/A N/A N/A N/A Pin 12 N/A 60 N/A N/A N/A A N/A N/A 13 65 N/A N/A B N/A N/A N/A N/A N/A N/A C N/A N/A N/A N/A N/A N/A D N/A N/A N/A N/A N/A N/A Global clock delay matrix:- Comb Reg SU Pin Cout Casc Clk : N/A 25 32 N/A 32 N/A Clr : N/A 28 N/A N/A 35 N/A Pre : N/A 28 N/A N/A 35 N/A Ena : N/A N/A N/A N/A N/A N/A Ald : N/A 28 N/A N/A 35 N/A OE : N/A N/A N/A N/A N/A N/A Cin : 16 N/A 2 N/A 2 19 Casc: 9 N/A N/A N/A N/A 12 Pin : N/A N/A N/A N/A N/A N/A A : 22 N/A 8 N/A 7 25 B : 20 N/A 6 N/A 7 23 C : 19 N/A 5 N/A N/A 22 D : 17 N/A 3 N/A N/A 20 I/O delay matrix:- Comb Reg SU Pin Cout Casc Clk N/A 33 N/A 77 N/A N/A Clr N/A 21 N/A 65 N/A N/A Pre N/A 26 N/A 70 N/A N/A Ena N/A N/A 13 N/A N/A N/A Ald N/A 26 N/A 70 N/A N/A OE N/A N/A N/A 61 N/A N/A Cin N/A N/A N/A N/A N/A N/A Casc N/A N/A N/A N/A N/A N/A Pin 12 N/A 60 N/A N/A N/A A N/A N/A 13 65 N/A N/A B N/A N/A N/A N/A N/A N/A C N/A N/A N/A N/A N/A N/A D N/A N/A N/A N/A N/A N/A Global clock delay matrix:- Comb Reg SU Pin Cout Casc Clk : N/A 25 32 N/A 32 N/A Clr : N/A 28 N/A N/A 35 N/A Pre : N/A 28 N/A N/A 35 N/A Ena : N/A N/A N/A N/A N/A N/A Ald : N/A 28 N/A N/A 35 N/A OE : N/A N/A N/A N/A N/A N/A Cin : 16 N/A 2 N/A 2 19 Casc: 9 N/A N/A N/A N/A 12 Pin : N/A N/A N/A N/A N/A N/A A : 22 N/A 8 N/A 7 25 B : 20 N/A 6 N/A 7 23 C : 19 N/A 5 N/A N/A 22 D : 17 N/A 3 N/A N/A 20 Threshold are: for Tsu - 9.500000ns and for Tco - 23.100000ns Global Tsu=-1(-1.000000), Tco=-1(-1.000000) Input/output cells: add1 -> 67 : IN bj -> 63 : OUT clk1hz -> 79 : IN clr -> 70 : IN en -> 69 : IN gp0 -> 191 : OUT gp1 -> 192 : OUT gp2 -> 193 : OUT gp3 -> 195 : OUT gw0 -> 169 : OUT gw1 -> 170 : OUT gw2 -> 172 : OUT gw3 -> 173 : OUT m10 -> 179 : OUT m11 -> 187 : OUT m12 -> 189 : OUT m13 -> 190 : OUT m20 : OUT m21 : OUT m22 : OUT m23 : OUT m30 : OUT m31 : OUT m32 : OUT m33 : OUT m40 : OUT m41 : OUT m42 : OUT m43 : OUT q0 -> 71 : IN q1 -> 73 : IN recude1 -> 68 : IN reset -> 64 : IN rst -> 65 : IN sw0 -> 174 : OUT sw1 -> 175 : OUT sw2 -> 176 : OUT sw3 -> 177 : OUT Set clique dont_touch: Cell: add1, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: bj, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: clk1hz, rdfbits: d, fast_io bit: 0, periphery: 0,0 Cell: clr, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: en, rdfbits: 5, fast_io bit: 0, periphery: 0,0 Cell: gp0, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: gp1, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: gp2, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: gp3, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: gw0, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: gw1, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: gw2, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: gw3, rdfbits: 3, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|LPM_ADD_SUB:188|addcore:adder|:55, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|LPM_ADD_SUB:209|addcore:adder|:59, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|LPM_ADD_SUB:504|addcore:adder|pcarry2, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|LPM_ADD_SUB:577|addcore:adder|pcarry2, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|LPM_ADD_SUB:650|addcore:adder|pcarry1, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|LPM_ADD_SUB:723|addcore:adder|pcarry1, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:23, rdfbits: 200110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:24, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:25, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:26, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:27, rdfbits: 200110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:28, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:29, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:30, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:31, rdfbits: 200110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:32, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:33, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:34, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:35, rdfbits: 200110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:36, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:37, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:38, rdfbits: 110, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~2, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~3, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~4, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~5, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~6, rdfbits: 201050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~7, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~8, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~9, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~10, rdfbits: 201050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~11, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~12, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~167~13, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:167, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:171, rdfbits: 200050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:265, rdfbits: 200050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:273, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:281, rdfbits: 200050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:380, rdfbits: 200050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:428, rdfbits: 200050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:440, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:452, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~789~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~846~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:896, rdfbits: 200050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~897~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~948~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:960, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|:971, rdfbits: 50, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1017~1, rdfbits: 201050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1017~2, rdfbits: 201050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1017~3, rdfbits: 201050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1017~4, rdfbits: 201050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1026~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1026~2, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1035~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1035~2, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1035~3, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1035~4, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1044~1, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1044~2, rdfbits: 1050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1053~1, rdfbits: 201050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1053~2, rdfbits: 201050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1053~3, rdfbits: 201050, fast_io bit: 0, periphery: 0,0 Cell: |JFEN:3|~1053~4, rdfbits: 2