/**
* \file w5300.c
* Implementation of W5300 I/O fucntions
*
* This file implements the basic I/O fucntions that access a register of W5300( IINCHIP_REG).
*
* Revision History :
* ---------- ------- ----------- ----------------------------
* Date Version Author Description
* ---------- ------- ----------- ----------------------------
* 24/03/2008 1.0.0 MidnightCow Release with W5300 launching
* ---------- ------- ----------- ----------------------------
* 01/05/2008 1.0.1 MidnightCow Modify a logical error in iinchip_irq(). Refer to M_01052008
* ---------- ------- ----------- ----------------------------
* 15/05/2008 1.1.0 MidnightCow Refer to M_15052008
* Delete getSn_DPORTR() because \ref Sn_DPORTR is write-only.
* Replace 'Sn_DHAR2' with 'Sn_DIPR' in \ref getSn_DIPR().
* ---------- ------- ----------- ----------------------------
*/
#include <stdio.h>
#include <avr/interrupt.h>
#include "md5.h"
#include "w5300.h"
#include "types.h"
/**
* TX memory size variables
*/
uint32 TXMEM_SIZE[MAX_SOCK_NUM];
/**
* RX memory size variables
*/
uint32 RXMEM_SIZE[MAX_SOCK_NUM];
/**
* The variables for SOCKETn interrupt
*/
uint8 SOCK_INT[MAX_SOCK_NUM];
/***********************
* Basic I/O Function *
***********************/
uint8 IINCHIP_READ(uint16 addr)
{
#if (__DEF_IINCHIP_ADDRESS_MODE__ == __DEF_IINCHIP_DIRECT_MODE__)
return ({*((vuint8*)(addr));});
#else
uint8 data;
*((vuint8*)IDM_AR) = addr >> 8;
*((vuint8*)IDM_AR1) = addr;
if(addr &0x01) data = *((vuint8*)IDM_DR1);
else data = *((vuint8*)IDM_DR);
return data;
#endif
}
void IINCHIP_WRITE(uint16 addr,uint8 data)
{
#if (__DEF_IINCHIP_ADDRESS_MODE__ == __DEF_IINCHIP_DIRECT_MODE__)
({*((vuint8*)(addr)) = data;});
#else
*((vuint8*)IDM_AR) = addr >> 8;
*((vuint8*)IDM_AR1) = addr;
if(addr &0x01) *((vuint8*)IDM_DR1) = data;
else *((vuint8*)IDM_DR) = data;
#endif
}
uint16 getMR(void)
{
return (IINCHIP_READ(MR_) << 8 | IINCHIP_READ(MR));
}
void setMR(uint16 val)
{
*((volatile uint8*)MR_) = val >> 8;
*((volatile uint8*)MR) = val & 0xff;
}
/***********************************
* COMMON Register Access Function *
***********************************/
/* Interrupt */
uint16 getIR(void)
{
return (IINCHIP_READ(IR0) << 8 | IINCHIP_READ(IR1));
}
void setIR(uint8 s, uint16 val)
{
IINCHIP_WRITE(IR,val&0xFF00);
}
uint16 getIMR(void)
{
return ((IINCHIP_READ(IMR0) << 8) | IINCHIP_READ(IMR1));
}
void setIMR(uint16 mask)
{
IINCHIP_WRITE(IMR0, mask >> 8);
IINCHIP_WRITE(IMR1, mask & 0xff);
}
/* Network Information */
void getSHAR(uint8 * addr)
{
addr[0] = IINCHIP_READ(SHAR);
addr[1] = IINCHIP_READ(SHAR1);
addr[2] = IINCHIP_READ(SHAR2);
addr[3] = IINCHIP_READ(SHAR3);
addr[4] = IINCHIP_READ(SHAR4);
addr[5] = IINCHIP_READ(SHAR5);
}
void setSHAR(uint8 * addr)
{
uint8 k;
for(k = 0; k < 6; k++) {
IINCHIP_WRITE(SHAR+k, addr[k]);
}
}
void getGAR(uint8 * addr)
{
addr[0] = IINCHIP_READ(GAR);
addr[1] = IINCHIP_READ(GAR1);
addr[2] = IINCHIP_READ(GAR2);
addr[3] = IINCHIP_READ(GAR3);
}
void setGAR(uint8 * addr)
{
IINCHIP_WRITE((GAR),addr[0]);
IINCHIP_WRITE((GAR1),addr[1]);
IINCHIP_WRITE((GAR2),addr[2]);
IINCHIP_WRITE((GAR3),addr[3]);
}
void getSUBR(uint8 * addr)
{
addr[0] = IINCHIP_READ(SUBR);
addr[1] = IINCHIP_READ(SUBR1);
addr[2] = IINCHIP_READ(SUBR2);
addr[3] = IINCHIP_READ(SUBR3);
}
void setSUBR(uint8 * addr)
{
IINCHIP_WRITE((SUBR),addr[0]);
IINCHIP_WRITE((SUBR1),addr[1]);
IINCHIP_WRITE((SUBR2),addr[2]);
IINCHIP_WRITE((SUBR3),addr[3]);
}
void getSIPR(uint8 * addr)
{
addr[0] = IINCHIP_READ(SIPR);
addr[1] = IINCHIP_READ(SIPR1);
addr[2] = IINCHIP_READ(SIPR2);
addr[3] = IINCHIP_READ(SIPR3);
}
void setSIPR(uint8 * addr)
{
IINCHIP_WRITE((SIPR),addr[0]);
IINCHIP_WRITE((SIPR1),addr[1]);
IINCHIP_WRITE((SIPR2),addr[2]);
IINCHIP_WRITE((SIPR3),addr[3]);
}
/* Retransmittion */
uint16 getRTR(void)
{
return ((IINCHIP_READ(RTR0) << 8) | IINCHIP_READ(RTR1));
}
void setRTR(uint16 timeout)
{
IINCHIP_WRITE(RTR0, timeout >> 8);
IINCHIP_WRITE(RTR1, timeout);
}
uint8 getRCR(void)
{
return (uint8)IINCHIP_READ(RCR);
}
void setRCR(uint8 retry)
{
IINCHIP_WRITE(RCR,retry);
}
/* PPPoE */
uint16 getPATR(void)
{
return ((IINCHIP_READ(PATR0) << 8) | IINCHIP_READ(PATR1));
}
uint8 getPTIMER(void)
{
return (uint8)IINCHIP_READ(PTIMER);
}
void setPTIMER(uint8 time)
{
IINCHIP_WRITE(PTIMER,time);
}
uint8 getPMAGICR(void)
{
return (uint8)IINCHIP_READ(PMAGICR);
}
void setPMAGICR(uint8 magic)
{
IINCHIP_WRITE(PMAGICR,magic);
}
uint16 getPSIDR(void)
{
return ((IINCHIP_READ(PSIDR0) << 8) | IINCHIP_READ(PSIDR1));
}
void getPDHAR(uint8* addr)
{
addr[0] = (uint8)(IINCHIP_READ(PDHAR) >> 8);
addr[1] = (uint8)IINCHIP_READ(PDHAR);
addr[2] = (uint8)(IINCHIP_READ(PDHAR2) >> 8);
addr[3] = (uint8)IINCHIP_READ(PDHAR2);
addr[4] = (uint8)(IINCHIP_READ(PDHAR4) >> 8);
addr[5] = (uint8)IINCHIP_READ(PDHAR4);
}
/* ICMP packets */
void getUIPR(uint8* addr)
{
addr[0] = (uint8)(IINCHIP_READ(UIPR) >> 8);
addr[1] = (uint8)IINCHIP_READ(UIPR);
addr[2] = (uint8)(IINCHIP_READ(UIPR2) >> 8);
addr[3] = (uint8)IINCHIP_READ(UIPR2);
}
uint16 getUPORTR(void)
{
return ((IINCHIP_READ(UPORTR0) << 8) | IINCHIP_READ(UPORTR1));
}
uint16 getFMTUR(void)
{
return ((IINCHIP_READ(FMTUR0) << 8) | IINCHIP_READ(FMTUR1));
}
/* PIN "BRYDn" */
uint8 getPn_BRDYR(uint8 p)
{
return (uint8)IINCHIP_READ(Pn_BRDYR(p));
}
void setPn_BRDYR(uint8 p, uint8 cfg)
{
IINCHIP_WRITE(Pn_BRDYR(p),cfg);
}
uint16 getPn_BDPTHR(uint8 p)
{
return ((IINCHIP_READ(Pn_BDPTHR0(p) << 8)) | IINCHIP_READ(Pn_BDPTHR1(p)));
}
void setPn_BDPTHR(uint8 p, uint16 depth)
{
IINCHIP_WRITE(Pn_BDPTHR0(p),depth >> 8);
IINCHIP_WRITE(Pn_BDPTHR1(p),depth);
}
/* IINCHIP ID */
uint16 getIDR(void)
{
return ((IINCHIP_READ(IDR) << 8) | IINCHIP_READ(IDR1));
}
/***********************************
* SOCKET Register Access Function *
***********************************/
/* SOCKET control */
uint16 getSn_MR(SOCKET s)
{
return ((IINCHIP_READ(Sn_MR_(s) << 8) | IINCHIP_READ(Sn_MR(s))));
}
void setSn_MR(SOCKET s, uint8 mode)
{
IINCHIP_WRITE(Sn_MR(s),mode);
}
uint8 getSn_CR(SOCKET s)
{
return IINCHIP_READ(Sn_CR(s));
}
void setSn_CR(SOCKET s, uint8 com)
{
IINCHIP_WRITE(Sn_CR(s),com);
while(IINCHIP_READ(Sn_CR(s))); // wait until Sn_CR is cleared.
}
uint8 getSn_IMR(SOCKET s)
{
return (uint8)IINCHIP_READ(Sn_IMR(s));
}
void setSn_IMR(SOCKET s, uint8 mask)
{
IINCHIP_WRITE(Sn_IMR(s),mask);
}
uint8 getSn_IR(SOCKET s)
{
#ifdef __DEF_IINCHIP_INT__ // In case of using ISR routine of iinchip
return (uint8)IINCHIP_READ(Sn_IR(s));
#else // In case of processing directly
return (uint8)IINCHIP_READ(Sn_IR(s));
#endif
}
void setSn_IR(SOCKET s, uint8 ir)
{
#ifdef __DEF_IINCHIP_INT__ // In case of using ISR routine of iinchip
IINCHIP_WRITE(Sn_IR(s),ir);
#else // In case of processing directly
IINCHIP_WRITE(Sn_IR(s),ir);
#endif
}
/* SOCKET information */
uint8 getSn_SSR(SOCKET s)
{
uint8 ssr, ssr1;
ssr = (uint8)IINCHIP_READ(Sn_SSR(s)); // first read
while(1)
{
ssr1 = (uint8)IINCHIP_READ(Sn_SSR(s)); // second read
if(ssr == ssr1) break; // if first == sencond, Sn_SSR value is valid.
ssr = ssr1;
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收起资源包目录
W5300_Drv_AVR_V1.0.zip (35个子文件)
W5300_Drv_AVR.aps 4KB
main.c 9KB
w5300_drv_avr.aws 1KB
w5300.c 32KB
socket.c 14KB
include
md5.h 584B
stdarg.h 2KB
uart.h 222B
socket.h 1KB
types.h 2KB
iinchip_conf.h 2KB
w5300.h 27KB
lstring.h 996B
time.h 640B
uart.c 966B
md5.c 8KB
lstring.c 9KB
default
dep
main.o.d 2KB
w5300.o.d 2KB
md5.o.d 458B
socket.o.d 2KB
uart.o.d 2KB
uart.o 3KB
lstring.o 13KB
md5.o 23KB
w5300.o 36KB
W5300_Drv_AVR.elf 60KB
W5300_Drv_AVR.eep 13B
W5300_Drv_AVR.hex 89KB
Makefile 2KB
W5300_Drv_AVR.map 29KB
main.o 11KB
socket.o 15KB
.map 46KB
Makefile.bak 2KB
共 35 条
- 1
资源评论
- sword012013-03-04骗人的,只有部分源码和几个头文件,工程里面很多中间生成的OBJ文件,大家不要下载
- hawkstore2013-07-02用过5300,还不错,官方有示例
- download_N2015-08-08只是一个demo 虽然不够好!作为参考页可以!
Sir王
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