Intel Pentium 4 Processor Optimization Contents
iv
Instruction Latency and Throughput............................................ 1-16
Execution Units and Issue Ports ................................................. 1-17
Caches........................................................................................ 1-18
Data Prefetch .............................................................................. 1-19
Loads and Stores ........................................................................ 1-21
Store Forwarding......................................................................... 1-22
Chapter 2 General Optimization Guidelines
Tuning to Achieve Optimum Performance.............................................. 2-1
Tuning to Prevent Known Coding Pitfalls ............................................... 2-2
General Practices and Coding Guidelines.............................................. 2-3
Use Available Performance Tools ...................................................... 2-3
Optimize Performance Across Processor Generations ..................... 2-4
Optimize Branch Predictability........................................................... 2-4
Optimize Memory Access .................................................................. 2-4
Optimize Floating-point Performance ................................................ 2-5
Optimize Instruction Selection ........................................................... 2-5
Optimize Instruction Scheduling ........................................................ 2-6
Enable Vectorization .......................................................................... 2-6
Coding Rules, Suggestions and Tuning Hints ........................................ 2-6
Performance Tools.................................................................................. 2-7
Intel® C++ Compiler .......................................................................... 2-7
General Compiler Recommendations................................................ 2-8
VTune™ Performance Analyzer ........................................................ 2-9
Processor Generations Perspective....................................................... 2-9
The CPUID Dispatch Strategy and Compatible Code Strategy....... 2-11
Branch Prediction ................................................................................. 2-12
Eliminating Branches ....................................................................... 2-12
Spin-Wait and Idle Loops................................................................. 2-15
Static Prediction............................................................................... 2-15
Branch Hints .................................................................................... 2-17
Inlining, Calls and Returns............................................................... 2-18
Branch Type Selection..................................................................... 2-19
5星 · 超过95%的资源 需积分: 10 102 浏览量
2008-11-19
17:48:00
上传
评论
收藏 2.21MB PDF 举报 
