Chapter 8: Main Memory
Chapter 8: Main Memory
8.2
Silberschatz, Galvin and Gagne ©2005
Operating System Concepts – 7
th
Edition, Feb 22, 2005
Chapter 8: Memory Management
Chapter 8: Memory Management
Background
Swapping
Contiguous Memory Allocation
Paging
Structure of the Page Table
Segmentation
Example: The Intel Pentium
8.3
Silberschatz, Galvin and Gagne ©2005
Operating System Concepts – 7
th
Edition, Feb 22, 2005
Objectives
Objectives
To provide a detailed description of various ways of
organizing memory hardware
To discuss various memory-management techniques,
including paging and segmentation
To provide a detailed description of the Intel Pentium, which
supports both pure segmentation and segmentation with
paging
8.4
Silberschatz, Galvin and Gagne ©2005
Operating System Concepts – 7
th
Edition, Feb 22, 2005
Background
Background
Program must be brought (from disk) into memory and placed
within a process for it to be run
Main memory and registers are only storage CPU can access
directly
Register access in one CPU clock (or less)
Main memory can take many cycles
Cache sits between main memory and CPU registers
Protection of memory required to ensure correct operation
8.5
Silberschatz, Galvin and Gagne ©2005
Operating System Concepts – 7
th
Edition, Feb 22, 2005
Base and Limit Registers
Base and Limit Registers
A pair of base and limit registers define the logical address space
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