System Control and Management Interface V3.1

本文档描述了一个基于ARM架构可扩展的与操作系统无关的软件接口，用于执行各种系统控制和管理任务，包括电源和性能管理。

vsipl 1.3和1.4的部分资源手册

This document contains minimum requirements for a VSIPL compliant library meeting a profile called VSIPL Core, or just Core. This is a companion requirements document to the VSIPL specification. All functions and data types in the Core profile must meet all requirements for functions and data types as defined in the VSIPL specification. 1 This document specifies requirements for implementations of the VSIPL++ Library.

ARMv8-A_Architecture_Reference_Manual_(Issue_A.a).pdf

The ARM architecture-described in this Architecture Reference Manual-defines the behavior of an abstract machine, referred to as a Processing Element, often abbreviated to PE. Implementations compliant with the ARM architecture must conform to the described behavior of the Processing Element.

arm架构的寄存器手册（armv8包含32bit和64bit）

This document is protected by copyright and other related rights and the practice or implementation of the information contained in this document may be protected by one or more patents or pending patent applications.

intel82574网卡手册

intel82574的网卡手册，包含寄存器手册和操作流程，中断说明，bar空间映射等等 The 82574 family (82574L and 82574IT) are single, compact, low power components that offer a fully-integrated Gigabit Ethernet Media Access Control (MAC) and Physical Layer (PHY) port.

GIC_V3的相关文档（最新版英文）

This document provides a software focused overview of the features of GICv3, and describes the operation of a GICv3 compliant interrupt controller. It is also a primer on how to configure a GICv3 interrupt controller for use in a bare metal environment. This document compliments the ARM® Generic

ActivePython-v2.7.10.zip

当前上传输是为了解决SecureCRT不识别Python脚本问题，版本为ActivePython 2.7，

ActivePython-v2.7.10.zip

当前上传输是为了解决SecureCRT不识别Python脚本问题，版本为ActivePython 2.7，

ls1043a/1023a的checklist

This document provides recommendations for new designs based on the LS1043A/LS1023A, which is a cost-effective, power-efficient, and highly integrated system-on-chip (SoC) design that extends the reach of the Freescale Value Performance line of QorIQ communications processors. This document can also be used to debug newly-designed systems by highlighting those aspects of a design that merit special attention during initial system start-up.

MT41K1G8手册

DDR3L (1.35V) SDRAM is a low voltage version of the DDR3 (1.5V) SDRAM. Refer to the DDR3 (1.5V) SDRAM data sheet specifications when running in 1.5V compatible mode.