SOLOMON SYSTECH
SEMICONDUCTOR TECHNICAL DATA
This document contains information on a new product. Specifications and information herein are subject to change without
notice.
http://www.solomon-systech.com
SSD1306 Rev 1.5 P 1/64 Aug 2010
Copyright © 2010 Solomon Systech Limited
Advance Information
SSD1306
128 x 64 Dot Matrix
OLED/PLED Segment/Common Driver with Controller
Solomon Systech Aug 2010 P 2/64 Rev 1.5 SSD1306
Appendix: IC Revision history of SSD1306 Specification
Version Change Items Effective Date
1.0 1
st
release
3-Oct-07
1.1 1. Revise typo
2. Revise command table
29-Apr-08
1.2 1. Add Charge pump section
2. Add Advance graphic commands : 23h, D6h
07-Jul-09
1.3 1. Revise Section 8.10 Charge Pump Regulator
2. Revise Section 12 DC Characteristics
3. Revise min. t
AS
Address Setup Time in Table 13-2 to 5ns
4. Add Figure 10-7 Oscillator frequency setting
5. Update declaimer
07-May-10
1.4 1. Replace SSD1306Z by SSD1306Z2 and add SSD1306Z2 into ordering
information (P.7)
2. Add Power ON and OFF sequence with Charge Pump Application in section
8.9 (p.29)
13-Jul-10
1.5 1. Update Power on/off sequence with charge pump application in section 8.9
(p.29)
27-Aug-10
SSD1306 Rev 1.5 P 3/64 Aug 2010 Solomon Systech
CONTENTS
1 GENERAL DESCRIPTION .......................................................................................................7
2 FEATURES...................................................................................................................................7
3 ORDERING INFORMATION...................................................................................................7
4 BLOCK DIAGRAM ....................................................................................................................8
5 DIE PAD FLOOR PLAN ............................................................................................................9
6 PIN ARRANGEMENT..............................................................................................................12
6.1 SSD1306TR1 PIN ASSIGNMENT.......................................................................................................................... 12
7 PIN DESCRIPTION ..................................................................................................................14
8 FUNCTIONAL BLOCK DESCRIPTIONS.............................................................................16
8.1 MCU INTERFACE SELECTION.............................................................................................................................. 16
8.1.1 MCU Parallel 6800-series Interface..........................................................................................................16
8.1.2 MCU Parallel 8080-series Interface..........................................................................................................17
8.1.3 MCU Serial Interface (4-wire SPI)............................................................................................................18
8.1.4 MCU Serial Interface (3-wire SPI)............................................................................................................19
8.1.5 MCU I
2
C Interface.....................................................................................................................................20
8.2 COMMAND DECODER ......................................................................................................................................... 23
8.3 OSCILLATOR CIRCUIT AND DISPLAY TIME GENERATOR..................................................................................... 23
8.4 FR SYNCHRONIZATION ....................................................................................................................................... 24
8.5 RESET CIRCUIT ................................................................................................................................................... 24
8.6 SEGMENT DRIVERS / COMMON DRIVERS ............................................................................................................ 25
8.7 GRAPHIC DISPLAY DATA RAM (GDDRAM)..................................................................................................... 26
8.8 SEG/COM DRIVING BLOCK ............................................................................................................................... 27
8.9 POWER ON AND OFF SEQUENCE ........................................................................................................................ 28
8.9.1 Power ON and OFF sequence with External V
CC
......................................................................................28
8.9.2 Power ON and OFF sequence with Charge Pump Application.................................................................29
8.10 CHARGE PUMP REGULATOR ............................................................................................................................... 30
9 COMMAND TABLE.................................................................................................................30
9.1 DATA READ / WRITE .......................................................................................................................................... 36
10 COMMAND DESCRIPTIONS .............................................................................................37
10.1 FUNDAMENTAL COMMAND ................................................................................................................................ 37
10.1.1 Set Lower Column Start Address for Page Addressing Mode (00h~0Fh) .................................................37
10.1.2 Set Higher Column Start Address for Page Addressing Mode (10h~1Fh) ................................................37
10.1.3 Set Memory Addressing Mode (20h)..........................................................................................................37
10.1.4 Set Column Address (21h) .........................................................................................................................38
10.1.5 Set Page Address (22h)..............................................................................................................................39
10.1.6 Set Display Start Line (40h~7Fh) ..............................................................................................................39
10.1.7 Set Contrast Control for BANK0 (81h)......................................................................................................39
10.1.8 Set Segment Re-map (A0h/A1h).................................................................................................................39
10.1.9 Entire Display ON (A4h/A5h)..................................................................................................................40
10.1.10 Set Normal/Inverse Display (A6h/A7h)..................................................................................................40
10.1.11 Set Multiplex Ratio (A8h).......................................................................................................................40
10.1.12 Set Display ON/OFF (AEh/AFh) ...........................................................................................................40
10.1.13 Set Page Start Address for Page Addressing Mode (B0h~B7h).............................................................40
10.1.14 Set COM Output Scan Direction (C0h/C8h)..........................................................................................40
10.1.15 Set Display Offset (D3h)........................................................................................................................40
10.1.16 Set Display Clock Divide Ratio/ Oscillator Frequency (D5h)...............................................................43
Solomon Systech Aug 2010 P 4/64 Rev 1.5 SSD1306
10.1.17 Set Pre-charge Period (D9h).................................................................................................................43
10.1.18 Set COM Pins Hardware Configuration (DAh).....................................................................................44
10.1.19 Set V
COMH
Deselect Level (DBh) ...........................................................................................................46
10.1.20 NOP (E3h) .............................................................................................................................................46
10.1.21 Status register Read...............................................................................................................................46
10.1.22 Charge Pump Setting (8Dh)...................................................................................................................46
10.2 GRAPHIC ACCELERATION COMMAND................................................................................................................. 47
10.2.1 Horizontal Scroll Setup (26h/27h).............................................................................................................47
10.2.2 Continuous Vertical and Horizontal Scroll Setup (29h/2Ah).....................................................................48
10.2.3 Deactivate Scroll (2Eh)..............................................................................................................................49
10.2.4 Activate Scroll (2Fh)..................................................................................................................................49
10.2.5 Set Vertical Scroll Area(A3h) .................................................................................................................... 49
10.3 ADVANCE GRAPHIC COMMAND.......................................................................................................................... 50
10.3.1 Set Fade Out and Blinking (23h) ...............................................................................................................50
10.3.2 Set Zoom In (D6h)......................................................................................................................................50
11 MAXIMUM RATINGS..........................................................................................................51
12 DC CHARACTERISTICS.....................................................................................................52
13 AC CHARACTERISTICS.....................................................................................................53
14 APPLICATION EXAMPLE..................................................................................................59
15 PACKAGE INFORMATION................................................................................................61
15.1 SSD1306TR1 DETAIL DIMENSION ..................................................................................................................... 61
15.2 SSD1306Z2 DIE TRAY INFORMATION................................................................................................................ 63
SSD1306 Rev 1.5 P 5/64 Aug 2010 Solomon Systech
TABLES
TABLE 5-1 : SSD1306Z2 BUMP DIE PAD COORDINATES.................................................................................................... 11
TABLE 6-1 : SSD1306TR1 PIN ASSIGNMENT TABLE.......................................................................................................... 13
TABLE 7-1 : MCU BUS INTERFACE PIN SELECTION............................................................................................................ 15
TABLE 8-1 : MCU INTERFACE ASSIGNMENT UNDER DIFFERENT BUS INTERFACE MODE ...................................................... 16
TABLE 8-2 : CONTROL PINS OF 6800 INTERFACE................................................................................................................. 16
TABLE 8-3 : CONTROL PINS OF 8080 INTERFACE................................................................................................................. 18
TABLE 8-4 : CONTROL PINS OF 4-WIRE SERIAL INTERFACE................................................................................................. 18
TABLE 8-5 : CONTROL PINS OF 3-WIRE SERIAL INTERFACE................................................................................................. 19
TABLE 9-1: COMMAND TABLE ........................................................................................................................................... 30
TABLE 9-2 : READ COMMAND TABLE................................................................................................................................. 36
TABLE 9-3 : ADDRESS INCREMENT TABLE (AUTOMATIC) ................................................................................................... 36
TABLE 10-1 : EXAMPLE OF SET DISPLAY OFFSET AND DISPLAY START LINE WITH NO REMAP.......................................... 41
TABLE 10-2 :EXAMPLE OF SET DISPLAY OFFSET AND DISPLAY START LINE WITH REMAP ................................................ 42
TABLE 10-3 : COM PINS HARDWARE CONFIGURATION ..................................................................................................... 44
TABLE 11-1 : MAXIMUM RATINGS (VOLTAGE REFERENCED TO VSS)................................................................................ 51
TABLE 12-1 : DC CHARACTERISTICS .................................................................................................................................. 52
TABLE 13-1 : AC CHARACTERISTICS .................................................................................................................................. 53
TABLE 13-2 : 6800-SERIES MCU PARALLEL INTERFACE TIMING CHARACTERISTICS......................................................... 54
TABLE 13-3 : 8080-SERIES MCU PARALLEL INTERFACE TIMING CHARACTERISTICS......................................................... 55
TABLE 13-4 : 4-WIRE SERIAL INTERFACE TIMING CHARACTERISTICS ................................................................................ 56
TABLE 13-5 : 3-WIRE SERIAL INTERFACE TIMING CHARACTERISTICS ................................................................................ 57
TABLE 13-6 :I
2
C INTERFACE TIMING CHARACTERISTICS.................................................................................................... 58
