nrf51822 pdf

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A low power ARMCortex -M0 32 bit CPU is embedded in all nRF51 series devices. The ARM Cortex -M0 has a 16 bit instruction set with 32 bit extensions (Thumb-2 technology) that delivers high density code with a small memory footprint. By using a single-cycle 32 bit multiplier, a 3-stage pipeline, an
Nordic semiconductor asa Tel.:+4772898900 NORDIC Fax:+4772898989 SEMICONDUCTOR Reg. nr / VAT no. 966011726 Anomaly overview §8888§ 豆妥豆 5x |器 m<u Description 1. ADC: ADC module analog front end does not power down when End event occurs 2. ADC: STOP task clears the result register 5Xxx 3. ADC: Setting ENABLE register to Disabled does not release the pins captured for GPIO 4. ANT: Erroneous packet transmission from anT slave channel 5. ANT: Bursting on a non-tracking channel 6. CPU: The CPU may fail to wake up if WFI are called from ISR's 7.DIF: Missing pull down on SWDCLK XXxXxxXx XxxxxxXx 8. GPIO: SENSE mechanism fires under some circumstances when it should not Xxxx xxxx Xxxx 9.GPIOTE:OUTINITfield in CONFIGn register is not functional GPIOTE: The module cannot receive tasks or detect transitions on pad the first 3 clock periods after being 10. enabled 11.HFCLK: Base current with HFCLK running is too high 12. HFCLK: Clock is paused when switching clock source for HFCLK clock XxXxxxx xxxxxx xxxXxxx XXx XxxxX 13. HFCLK: XTALFREQ register is not functional 14. LFCLK: Calibration does not request HFCLK XXx 15. POWER: It is not possible to distinguish between Power on reset and reset from off by RESETREAS 16. POWER: RAMON reset value causes problems under certain conditions X X 17. RADIO: ENd to staRt connection using ppi or short is not functional 8. RADIO: RSST module analog front end does not power down when rssiend event occurs 19.RADIO: RSSTSTOP task clears the RSSISAMPLE register Xxxxxxx Xxxx XXx XxxXx XXXXXx 20.RADIO: State Register is not functional X Page 3 of 25 Nordic semiconductor asa Tel.:+4772898900 NORDIC Fax:+4772898989 SEMICONDUCTOR Reg. nr/VAT'no: 966011726 Nc∞aLE 品<山 Description 21. RNG: Generated random value is reset when valrdY event is cleared c2Exx NLsxx 22. RNG: RNG does not generate a new number after the current number generated Xxx 5xxx Xxx NoExxx 23.RNG: STOP task clears the VALUE register 24.RNG: The STOp task cannot be assigned to a PPI channel 25.System: Programmer/Debugger is unable to discover the Cortex-M SW device 26.System:Manual setup is required to enable use of peripherals xxxxxXx XXXXXXXx Xxxx XXxXX 27. System: System OFF and System On current higher than specified 28. TEMP: Negative measured values are not represented correctly 29. TEMP: STOP task clears the TEMP register 30. TEMP.: TEMP module analog front end does not power down when datardy event occurs 31. TEMP: Temperature offset value has to be manually loaded to the TEMP module 32. TIMER: BITMODE is not functional for TIMERO TIMER: One CC register is not able to generate an event for the second of two subsequent counter/ timer 33. values XxxxxX XxXXx xxxXx 34.TIMER:Timer cannot handle quick START-STOP-START tasks correctly 35. TWI: Consumes too much current when it is enabled and the STOP task is triggered 36. TWI: Shortcuts described in nRF51 Reference Manual are not functional 37. UART: After a stoPrX task the uart will not be able to finish transaction XxxXX XXXXX 38.WDT:The watchdog config option "RUN while paused by the debugger"does not work X X Product: nRF51822-QFAA nRF51422-QFAA nRF51822-QFAB nRF51822-CEAA DOc D: PAN-028. rev. 1.6 Date:2013-05-15 Page 4 of 25 Nordic semiconductor asa Tel.+4772898900 NORDIC Fax:+4772898989 SEMICONDUCTOR Reg. nr /VAT no: 966011726 1. ADC: ADC module analog front end does not power down when END event occurs Symptoms: Higher current consumption Conditions. Always Consequences Higher current consumption Workaround: Trigger STOP task to power down analog front end and reduce power consumption 2. ADC: STOP task clears the resULT register Symptoms When stoP task is triggered, value register is cleared Conditions: Always Consequences: If StoP task is triggered before reading the converted value in RESULT, the value will be lost and read as 0x00 Workaround Read rESULt before triggering STOP task Page 5 of 25 Nordic semiconductor asa Tel.+4772898900 Fax:+4772898989 ANORDIC NDU Reg. nr /VAT no. 966011726 3. ADC: Setting ENABLE register to Disabled does not release the pins captured for GPio Symptoms: Pins used previously for the ADC cannot be used as GPIO Conditions. After assigning those pins to the ADC and enabling the aDC Consequences Pins cannot be used as GPIOs after being used as analog pins for the aDC Workaround: EXecute the following code after setting ADC ENABLE register to Disabled NRE ADO->CON上1G=( AADC CONEIG RES8上⊥t <s ADC CONE'IG RES Pcs) (ADC CONEIG INESEL SupplyTwoThirdsPrescaling < ADC CONE IG INP SEL Pcs) (ADC CONEIG REESEL VeG < ADC CONEIG REESEL Pos) ONEIG (ADC CONFTG F.XTREFSFT None < ADC CONFTG FXTRF.T, Pos) 4. ANT: Erroneous packet transmission from ant slave channel Symptoms: When running an ant slave channel in a multi-channel environment unintended packet transmissions from an ant slave channel may be received by an ant master channel Conditions Condition can occur in a multi-channel scenario(on the same device) where a slave channel and 1 or more channels are assigned with the same channel id(device number, device type and transmission type) Consequences: The peer device running the ANT master channel may receive unintended transmission packets from ANT slave channel on the reverse channel direction even though no packet transmission was initiated by the AnT Slave channel Workaround Avoid setting the same channel Id (device number, device type and transmission type) for multiple channels on the same device Product: nRF51822-QFAA nRF51422-QFAA nRF51822-QFAB nRF51822-CEAA DOC D: PAN-028. rev. 1.6 Date:2013-05-15 Page 6 of 25 Nordic semiconductor asa Tel.+4772898900 Fax:+4772898989 ANORDIC NDU Reg. nr /VAT no. 966011726 5. ANT: Bursting on a non-tracking channel Symptoms Attempting to send a burst transfer when the ant channel is not in a tracking state will result in the burst transfer not completing and will prevent any future tx burst transfers from succeeding Conditions: Sending a burst transfer on a channel when it is not in the tracking state (i.e. when the channel is either searching or not opened) Consequences: The ant burst handler request( API functionality will be in a stuck state. Any future burst requests will automatically fail with a svc return error and/or no burst transmission being performed. Supplied burst handler wait flag will not be cleared EVEnt TRANSFER NEXT DatA blocK event will not be generated Workaround Before sending a burst transfer, ensure that the channel is in a tracking state by issuing the ant channel status get() API call. If the ant burst request handler becomes stuck, a stack reset (ant stack reset() will be required to restore the aPI functionality 6. CPU: The CPU may fail to wake up if WFI are called from ISR's Symptoms CPU may skip interrupts or not wake up from sleep mode after calling Wait For Interrupt(WFI) from an ISR Conditions: CPU is put in sleep mode by Wait For Interrupt ( WFI)inside an Interrupt Service Routine(ISR) When the CPU is in sleep mode, the nRF51 has a hw mechanism to ensure that interrupts from peripherals with equal or lower priority will NOT wake up the CPU When a new interrupt arrives the HW mechanism will use 64 HFClK cycles to evaluate the priority before it decides whether to wake up the Cpu or mask the event, keeping the CPU in sleep mode When this HW mechanism masks an interrupt of equal or lower priority, any interrupt arriving in the last of the 64 HFCLK cycles will also be masked, regardless of its priority Consequences Masking a second interrupt, regardless of priority, may result in the cPU remaining in sleep when it should have woken up on this interrupt. Subsequent events from the same peripheral will also fail to wake up the CPU Workaround Only call Wfi from Thread mode Or Ensure that no lower-priority interrupts are enabled in the peripherals before calling WFI Note: The interrupts have to be disabled in the peripherals, not in the NVIC Product: nRF51822-QFAA nRF51422-QFAA nRF51822-QFAB nRF51822-CEAA DOC D: PAN-028. rev. 1.6 Date:2013-05-15 Page 7 of 25 Nordic semiconductor asa Tel.+4772898900 Fax:+4772898989 ANORDIC NDU Reg. nr /VAT no. 966011726 7. DIF: Missing pull down on SWDCLK Symptoms Pin reset function may not work High current consumption Device is hanging Conditions. Always Consequences Pin reset function may not work High current consumption Device is hanging Workaround Add external 12k pull down on SWDCLK pin If no programming or debug is ever used the SWdCLK can be connected to GND Note: The external resistor shall not be mounted on pcbs when a device that has this pan fixed is used 8. GPIO: SENSE mechanism fires under some circumstances when it should not Symptoms Sometimes a PORt event is generated when it should not have been generated Conditions. Pre-Condition Input buffer is disabled Operation: Connect the input buffer and enable the sense functionality on the pad in the same write operation to PIN CFG Consequences False interrupt and/or PORT event might be triggered at write to PIN CNF register. Workaround Always enable the input buffer in a separate write operation, before enabling the sense functionality Product: nRF51822-QFAA nRF51422-QFAA nRF51822-QFAB nRF51822-CEAA DOC D: PAN-028. rev. 1.6 Date:2013-05-15 Page 8 of 25 Nordic semiconductor asa Tel.+4772898900 Fax:+4772898989 ANORDIC NDU Reg. nr /VAT no. 966011726 9. GPIOTE: OUtINIT field in CoNFIGn register is not functional Symptoms Initial value for GPloTE output after configuration is undefined Conditions. Configuring a GPlotE channel as a task Consequences Application specific Workaround 1. Configure the GPlOTE channel as follows MODE, TASK PSEL: Set to unused output pin POLARITY: LO TOHI if initial high desired or hiTolo if initial low desired 2. Trigger the OUT task 3. Reconfigure the GPIOTE channel as follows MODE: TASK PSEL, <GPIO used for function> POLARITY: <Desired polarity (toggle, LoToHi or HiToLo> OUTINIT <Desired initial value> The following inline function can be used to perform this action sta=ic INLINE void nrf gpiote task config(uint32 t channel number, uint32 t pin number, nrf gpiote polarity t polarity, nrf gpiote outinit t ini=ial value) / Check if the output desired is high or lcw *i if( initia1a⊥ue==GP工 OTE CONF工GOUT工N工Iow) / Configure channel to Fin.3 cted o he pin, and cor figure as a tasks that will set it = o proper level * NRE GPIOTE->CONEIG [channel number] (GPIOTE CONEIG MODE Task <<.GF工 TE CONE工 G MODE POs) (GPIOTE CONFIG POLARITY HITOLO < GFIOTE CONFIG POJARITY Pcs)i e⊥se / Configure channel to Fin.31, not connected to the pin and configure as a tasks that will set it =o proper level * NRE GPIOTE->CONEIG[channel number] (GPIOTE CONE'IG MOCE Task < GEIOTE CONF'IG MODE POS) IUL < GEIOTE CONFIG PSEL Po (GPIOTE CONFIG POLARITY LO TOHi < GFIOTE CONFIG POARITY PCS)i ired to make is written before setting tasks or getting events / Launch the task to take the GPICTE channel output to the desired level */ NR= GPIOTE->TASKS OUT [channel number]= 1 k Finally configure the channel as the caller expec=s If OUTINIT works, the channel is configured properly I it does notr the channel output inheritance se-s he proper level.*/ NR- GPIOTE->CONFIG[ channel number]=(GPIotE CONF'IG MODE Iask < GPIOTE CONE'IG MODE PoS ((uint32 -)pin number GPIOTE CONFIG PSEL POS) ((uint32 =)polarity < GPIOTE CONFIG POLARITY Pos ((uint32 initial value < GPIOTE CONFIG OUTINIT Fos)i Product: nRF51822-QFAA nRF51422-QFAA nRF51822-QFAB nRF51822-CEAA DOC D: PAN-028. rev. 1.6 Date:2013-05-15 Page 9 of 25 Nordic semiconductor asa Tel.+4772898900 Fax:+4772898989 ANORDIC NDU Reg. nr /VAT no. 966011726 / Three NoPs are required to make sure configuration is writer before setting tasks or getting events * NOP( P(); NOP(i 10. GPIOTE: The module cannot receive tasks or detect transitions on pad the first 3 clock periods after being enabled Symptoms a task is not always detected by the module Conditions Right after enabling the module Consequences None other than the effect it will have on the application Workaround Ensure that no task is sent to the module the first 3 clock cycles after enabling Adding 3 NOP statements between enable and setting tasks is recommended 11. HFCLK: Base current with HFCLK running is too high Symptoms: Base current is up to 400 Ha higher that stated in the product specification Conditions When hFclK clock is running Consequences 1. If timER is the only module running, too much power is drawn from the power supply Operation therefore cannot be guaranteed in all situations 2. Average current consumption for the system will be higher than specified Workaround To avoid potential problems while tIMER is running use constant latency mode, see POWER.CONSTLAT task while tiMER is running To minimize idle current, use the PoWer. LoWPWr task when timer is not running Product: nRF51822-QFAA nRF51422-QFAA nRF51822-QFAB nRF51822-CEAA DOC D: PAN-028. rev. 1.6 Date:2013-05-15 Page 10 of 25

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小凤天下 帮朋友下载的,朋友急需的
2016-12-09
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wang1000 比较好的技术手册
2015-06-25
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hzlmain 有用的数据手册
2014-08-17
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qq_16907651 俺以为是Datasheet,不料是个Errata。呵呵,继续找Datasheet。
2014-06-25
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Sinly1 看了,对我帮助不小
2014-04-30
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