复位芯片MAX811T

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常用复位芯片MAX811T的原始英文数据手册
4-Pin Ap voltage Monitors with Manual Reset Input ELECTRICAL CHARACTERISTICS (continued) (VcC =5V for L/M versions, Vcc =3.3V for T/s versions, Vcc= 3V for R version, TA=-40'C to +85C, unless otherwise noted Typica values are at TA=+25'C ) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAXUNITS MAX811R/S/T only, ISIN 03 VCC=VTH(MIN) ∨C OL MAX811L/M only, ISINK=3.2mA 4 CC =VTH(MIN) RESET Output Voltage ISINK= 50HA, Vcc>1.0V 03 ⅥAX811 MAX8 1 1R/S/T only, ISoURCE= 500HA 0.aVcC CC>VTH(MAX) MAX811L/M only, ISOURCE= 800HA cC-1.5 Note 1: Production lesting done at TA=+25.C, over temperature limits guaranteed by design using six sigma design limits Note 2: RESET output for MAX8 11, RESET output for MAX8 12 Note 3: Glitches" of 100ns or less typically will not generate a reset pulse 4-Pin Hp Voltage Monitors with Manual Reset Input Typical Operating Characteristics (TA=+25.C, unless otherwise noted. SUPPLY CURRENT VS TEMPERATURE SUPPLY CURRENT VS, TEMPERATURE POWER-DOWN RESET DELAY VS. TEMPERATURE B1_R/S/T) (MAX81_L/M) MAX81_R/S/T) 8 VOD= VTH-Vo VGc =3.6V 2.5 Vop= 20mV 6 Vcc=5.5V 80 2.0 60 Vcc= 3v VoD 125mV 0.5 OD 0 1510 15 TEMPERATURE(C EMPERATUREC) TEMPERATURE°C) POWER-DOWN RESET DELAY VS TEMPERATURE POWER-UP RESET TIMEOUT RESET THRESHOLD DEVIATION (AX81_L/M) VS TEMPERATURE VS, TEMPERATURE 230 1.0005 VOD= V-H-Vce MAX81 R/S/T Von= 20mV 1.0000 出2 三220 劣210 09990 VoD= 125mV 当200 MAX81 L/M 09985 Voc= 200mV 09980 40-1510 35 15 10 356085 -40-1510356085 TEMPERATURE ('C) TEMPERATURE(°C) TEMPERATURE (C) 4-Pin Ap voltage Monitors with Manual Reset Input Pin Description NAME FUNCTION MAX811MAX812 GND Ground Active-Low Reset Output. RESET remains low while Vcc is below the reset threshold or while RESET MR is held low. RESET remains low for the Reset Active Timeout Period(tRP)after the reset conditions are terminated Active-High Reset Output. RESET remains high while Vcc is below the reset threshold or while RESET MR is held low. RESET remains high for Reset Active Timeout Period(tRP) after the reset condi- tions are terminated Manual Reset Input. a logic low on mR asserts reset Reset remains asserted as long as mr is MR low and for 180ms after MR returns high. This active-ow input has an internal 20kQ2 pull-up resistor. It can be driven from a TtL or CMOs-logic line, or shorted to ground with a switch Leave open if unused 4 4 Vcc+5V, +3.3V, or +3V Supply Voltage Detailed Description Manual Reset Input Many uP-based products require manual reset capabil Reset Output ity, allowing the operator, a test technician, or external A microprocessor's(uP's) reset input starts the pP in a logic circuitry to initiate a reset. A logic low on MR known state. These uP supervisory circuits assert reset asserts reset. Reset remains asserted while MR is low to prevent code execution errors during power-up, and for the reset Active Timeout Period(tRP) after MR power-down, or brownout conditions returns high. This input has an internal 20kQ2 pull-up RESET is guaranteed to be a logic low for Vcc>1V. resistor, so it can be left open if it is not used. MR can Once Vcc exceeds the reset threshold, an internal be driven with TTL or CMOS-logic levels, or with open timer keeps RESEt low for the reset timeout period drain/collector outputs. Connect a normally open after this interval, reset goes high momentary switch from Mr to GND to create a manual If a brownout condition occurs(Vcc dips below the reset function; external debounce circuitry is not reset threshold), reset goes low. Any time Vcc goes required. If MR is driven from long cables or if the below the reset threshold, the internal timer resets to device is used in a noisy environment, connecting a zero, and reset goes low. The internal timer starts 0. 1uF capacitor from MR to ground provides additional after Vcc returns above the reset threshold and reset noise immunity emains low for the reset timeout period Reset Threshold Accuracy The manual reset input(MR)can also initiate a reset The MAX811/MAX812 are ideal for systems using a 5V See the Manual Reset input section +5%or 3V+5% power supply with ICs specified for 5V The maX812 has an active-high reset output that is +10%or 3V+10%, respectively. They are designed to the inverse of the MAX811's reseT output meet worst-case specifications over temperature. The reset is guaranteed to assert after the power supply falls out of regulation, but before power drops below the minimum specified operating voltage range for the system ICs. The thresholds are pre-trimmed and exhibit tight distribution, reducing the range over which an undesirable reset may occur 4-Pin Hp Voltage Monitors with Manual Reset Input TA 6 MAX81 L Vcc 5 MAX81 R/S/T MAX811 RESET GND 1000 RESET COMPARATOR OVERDRIVE, VTH-Vcc(mV Figure 1. Maximurm Transient Duration without Causing a Figure 2. RESET Valid to VCC Ground Circuit Reset Pulse vs Comparator Overdrive Applications Information Ensuring a Valid RESET Output Down to VCC = ov Negative-Going VcC Transients When VcC falls below 1V, the MAX811 RESET output In addition to issuing a reset to the pP during power-up, no longer sinks current--it becomes an open circuit power-down, and brownout conditions, the MAX811/ Theretore, high-impedance CMOS-logic inputs con- MAX812 are relatively immune to short duration nega nected to the RESet output can drift to undetermined tive-going VcC transients(glitches) voltages. This presents no problem in most applica Figure 1 shows typical transient durations vs. reset tions, since most pP and other circuitry is inoperative comparator overdrive, for which the MAX811 /MAX812 with Vcc below 1V. However, in applications where the do not generate a reset pulse. This graph was generat- p ed using a negative-going pulse applied to vcc, start- down resistor to the RESeT pin will cause any stray ing above the actual reset threshold and ending below eakage currents to flow to ground, holding RESEt low it by the magnitude indicated (reset comparator over (Figure 2). R1 s value is not critical; 100kQ2 is large drive). The graph indicates the typical maximum pulse enough not to load RESET and small enough to pull width a negative-going Vcc transient may have without RESET to ground causing a reset pulse to be issued As the magnitude A 100kQ pull-up resistor to Vcc is also recommended of the transient increases(goes farther below the reset for the maX8 12 if RESet is required to remain valid for threshold), the maximum allowable pulse width VCC< 1V decreases. Typically, a Vcc transient that goes 125m below the reset threshold and lasts 40us or less (MAX81_L/M)or 20us or less(MAX81_T/S/R) will not cause a reset pulse to be issued. A0 1uF capacitor mounted as close as possible to Vcc provides addi tional transient immunity 6 ∠AX 4-Pin Ap voltage Monitors with Manual Reset Input Interfacing to HPs with Bidirectional reset pins uPs with bidirectional reset pins(such as the Motorola 68HC11 series) can contend with the MAX8 11/MAX8 12 BUFFERED RESET reset outputs. If, for example, the MAX811 RESet out TC OTHER SYSTEM put is asserted high and the up wants to pull it low COMPONENTS indeterminate logic levels may result. To correct such cases, connect a 4.7ke resistor between the maX8 11 RESET (or MAX8 12 RESET) output and the up reset I/O (Figure 3 Buffer the reset output to other system com ponents M4X811 47k RESET H RESET Chip Information GND GND TRANSISTOR COUNT: 341 re3. Interfacing to uPs with Bidirectional/ Reset /O 4-Pin Hp Voltage Monitors with Manual Reset Input Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information Jotowww.maxim-ic.com/packages.) 4.0±0.1 15±0.1 1.75±0.1 2.0±0.05 8.0±02 MARKING 4.0±0.1 3.5±0.05 INFORMATION Y 91.1±0.1 OT SPECIFIC CODE X XI X NOTE: DIMENSIONS ARE IN MM AMAA or KABB= MAX811L AND FOLLOW EIA481-1 STANDARD ANAA or KABC E MAX811M APAA or KABD= MAX811T AQAA or KABE= MAX811S ARAA or KABF= MAX811R AsAA or KABG= MAX812L ATAA or Kabh= maX812M AVAA or KAbl= MAX812T AWAA or KaBj= MAX812S ICS MAY ALSO BE MARKED WITH FULL PART NAME: 811L, 811M AXAA or KABK= MAX812R INcHES MILLIMETERS S DIM MIN MAX MIN MAX A00310048080 WITH PLATING LA0.00000610010.158 00140020035050 Lhl001200:8030045 k20030003507609 k3001200330.760.84 C El E c0.00000008020 000000600806 PIN 1 BASE METAL- □n1100120280304 00830104210264 SECTION b-b e 0.076 BSC.1.92 BSC, 2 10.008BSC.020BSC L00160024040060 0.021REF SEE DETAIL 'A s0018002404506 A1 SEATING PLANE NOTESI 1. D&E Do NOT INCLUDE MOLD FLASH 2. MOLD FLASH OR PROTRUSIONS NOT To EXCEED, 15nm (.006"> 3. CONTROLLING DIMENSION: MILLIMETERS 鹽 ALLAS∥AX∥ MEETS JEDEC T0253 THESE DIMENSIONS APPLY T囗 THE FLAT SECTION囗F TITLE THE LEAD BE TWEEN 0.08mm and 0. 15mm FROM THE LEAD TIP PACKAGE OUTLINE SOT-143 4L 210052 Maxim carnot assume rosponsibility for usc of any circuitry othor than circuitry cntircly ombodicd in a Maxim product. No circuit patent licenses arc implied. Maxim reserves the right to change the circuitry and specifications without notice at any time Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737.7600 o 2005 Maxim Integrated Products Printed USa MAXI is a registered trademark of Maxim Integrated Products, Inc

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