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InfiniBand Architecture Specification Volume 2 Release 1.3
InfiniBand M architecture release 1.3 November 6. 2012 VOLUME 2- PHYSICAL SPECIFICATIONS Final release 1.1 Document Conventions 24 1.1.1 Normative terms 24 1.1.2 Informative terms 24 1.1.3 Compliance Notation ,, 24 1.1.4 Architecture notes 25 23456789012 1.1.5 Implementation Notes 25 1.1. 6 Recommendation References and related documents 25 14 1.3 Acknowledgments 28 15 1.3.1 Steering Committee 28 16 1.3.2 Technical Work Group 1.3.3 Volume Working Group 29 18 1.4 Disclaimer 32 19 20 2.1 21 a to c 33 22 2.2 D toh 35 23 2.3 to l 日日 39 24 2.4 M to P 43 25 2.5 Q to s ■重面面,,面1面1面日面面重 48 26 2.6 T to z 51 27 28 29 3.1 Introduction 30 3.2 Physical port 56 32.1Muti- porting…… 58 32 3.2.2 Active Cables .60 33 3.3 Link Electrical Signaling 60 34 3.4 Link Optical Signaling 60 35 3.5 Link Physical Layer. 60 36 3.5.1 Speed Negotiation 61 37 3.5.2 Width Negotiation 61 38 3.6 Module mechanical 62 9 3.7 Chassis slot mechanical 63 3.8 Power.… 1■重 ,65 3444 2 InfiniBand M Trade association Page 3 InfiniBand M architecture release 1.3 November 6. 2012 VOLUME 2- PHYSICAL SPECIFICATIONS Final release 3.9 Hardware Management 65 3.10 Operating System(os)Power Management 66 4.1 Signal naming conventions ■重重 67 4.2 Port Signal Summary 68 234567 4.2.1 Backplane Port 69 4.2.2 Cable Port Using Micro Giga CN O。 nnector....…..….71 4.2.3 Fiber Optic Port 72 4.2. 4 Active Cable Port Using Micro GigaCN Connector .73 4.2.5 Cable Port Using QSFP/QSFP+ Connector Interface 74 78g11 4.2.6 Cable Port Using CXP/CXF+ Connector interface…….… ..74 12 4.3 Signaling group 74 4.3.1 High Speed Electrical 1能 74 14 4.3.2 High Speed Optical 74 15 4.4 Hardware Management Group 74 16 4.5 Bulk Power Group... 75 4.6 Auxiliary Power Group 76 18 4.7 Active Cable Power Group 重D重国面重重面重1D量面国重重重 76 19 20 21 5.1 Introduction 22 5.2 Symbol Encoding(8b/10b coding) 79 23 5.2.1 Notation conventions 24 5.2.2 Valid and invalid code-groups.. 81 25 5.2.3 Running disparity rules 88 26 5.2. 4 Generating code-groups 27 5.2.5 Checking the validity of received code-groups 91 28 5.3 Block Encoding(64b/66b) .92 29 5.3. 1 Scrambling 92 30 5.3.2 Checking the validity of a received block 94 5.3.3 Block synchronization 32 5.34 Error detection per lane .98 33 54 Forward error correction 100 34 5.41 FEc Block Format 101 35 5.4.2 FEC Encoder 102 36 5.43 FEC Decoder 103 37 5.4.4 FEC Transmit/Receive bit ordering 105 38 54.5 FEC EXample… 105 39 5.5 Control Symbols/Blocks and Ordered-Sets 107 40 41 5.5.1 Control Symbols/Blocks 108 42 InfiniBand M Trade association Page 4 InfiniBand M architecture release 1.3 November 6. 2012 VOLUME 2- PHYSICAL SPECIFICATIONS Final release 5.5. 2 Control Ordered-sets 8b/10b encoding 110 5.5.3 Control block 64b/66b encoding 122 5.5.4 Logical Interfaces 127 56 Management datagram control and status interface 128 5.6. 1 Control Inputs(MAD set) 128 5.6.2 Status Outputs(MAD get) 131 5.6.3 Port Performance counters ..135 5.7 Packet Formats for Single and Multi Lane Support 136 5.7.1 Link Packet Ordering 136 5.7.2 Packet formats 138 678g11 5.7.3 1x Packet format 139 5.7.4 4x Packet format 141 12 5.7.58 x Packet format.……… 143 5.7.6 12x Packet format 145 14 5.8 Link Initialization and training 148 15 5.8. 1 Link De-skew Training Sequence and SKiP ordered sets. .............................149 16 5.8.2 Link Initialization and Training Options 152 5.8.3 Interactions With other entities 翻8 153 18 5.8.4 Link Training State Machine 154 19 5.8.5 State Machine delays and T imeouts 183 20 5.8.6 Transmitter interface and behavior 184 21 5.8.7 Receiver Interface and behavior 188 22 5. 9 Link Physical Error Handling 193 23 Link Physical Errors Events 193 24 5.9.2 Minor link Physical Errors Events 194 25 5.9.3 Link Physical Error Threshold Algorithm 194 26 5.9.4 Major Link Physical Errors Events 195 27 59.5 Heartbeat err 196 28 5. 10 Internal Serial Loopback 196 29 5. 11 Clock Tolerance Compensation .197 30 5.11.1 Transmitter SKIP "Requirements 197 5.11.2 Receiver"SKIP Requirements. 198 32 5. 12 Retiming Repeaters 199 33 5.12.1 Retiming Repeater Functions 34 ,B面 199 5.122C| ock Tolerance Compensation………… 201 35 5.12.3 Error Handling Considerations 201 36 5.12.4 Symbol Boundary Alignment 202 37 5. 12.5 Multi-lane Repeater Considerations 202 38 203 39 5. 12.6 Power state Considerations 5.13 Fine Tuning 40 204 41 5.13.1 Fine Tuning Block 204 42 InfiniBand M Trade association Page 5 InfiniBand M architecture release 1.3 November 6. 2012 VOLUME 2- PHYSICAL SPECIFICATIONS Final release 5.13.2 Fine Tuning Rules 205 5.13.3 Fine Tuning State Machine 205 5. 13. 4 Fine Tuning Operation 207 5.14 Link heartbeat ■■■ 209 5. 14.1 Operation of Link Heartbeats .210 5. 14.2 Heartbeat Error Handling 211 5. 14.3 Heartbeat Latency Calculation and Reporting 211 5.15 Max Packet rate 212 5. 16 FDR and Higher Rate Transmitter equalization 213 5. 17 Physical Layer Compliance Testing 213 5678g11 5.17.1 Compliance Testing Overview 1画翻面 213 5. 17.2 Compliance Testing Facilities 214 12 5. 17.3 EXample Compliance Test procedure 220 14 15 6.1 Introduction .222 16 6. 1. 1 Background and Reference Material 222 6.2 Electrical Topologies 223 18 6.2.1 Repeaters… 225 19 6.22 Cable Types… 227 20 6.3 General Requirements 重1重日重■ 230 21 6.3.1 Electrostatic Discharge(ESD)…… 230 22 64 Compliance facilities 231 23 6.4.1 Compliance Points 231 24 6.4.2 Compliance Test Hardware 234 25 6.4.3 Link/Phy compliance provisions , 26 6.5 Equalization methodology 235 27 Equalization for Infini Band release 1.1 devices 236 28 6.5.2 qualization for InfiniBand release 1. 2. 1 devices 236 29 6.5.3 Equalization for InfiniBand release 1. 3 devices 238 30 6.6 Differential Driver Outputs 239 31 General requirements 239 32 6.6.2 Host Driver output characteristics for SDR 241 33 6.6.3 Host Driver output characteristics for DDR 243 34 6.6.4 Host Driver output characteristics for QDR .246 35 6.6.5 Host Driver output characteristics for FDR 249 36 6.6.6 Driver Output characteristics for EdR 257 37 6.7 Differential Receiver Inputs 258 38 39 6.7.1 General requirements 258 40 6.7.2 Beacon Signaling 258 41 673 Signaling Cautions… 259 42 InfiniBand M Trade association Page 6 InfiniBand M architecture release 1.3 November 6. 2012 VOLUME 2- PHYSICAL SPECIFICATIONS Final release 6.74 Termination ..259 6.7.5 Host Receiver input characteristics for SDR 260 6.7.6 Host receiver input characteristics for ddR 262 6. 7.7 Host Receiver input characteristics for QDR 264 6.7.8 Host Receiver input characteristics for FDR 266 6. 7.9 Host Receiver input characteristics for EDR 268 6.8 Compliant channels 269 6.8.1 DC Blocking… 269 6.8.2 Linear Cable Electrical Requirements ..270 6.8.3 Lane-to-ane skew .271 5678g11 6.8.4 SDR (2.5 Gb/s)compliant channel 272 6.8.5 DDR(5.0 Gb/s)linear channels and Limiting Active Cables 277 12 6.8.6 QDR(10.0 Gb/s)linear channels and Limiting Active Cables 280 6.8.7 FDR (14.0625 Gb/s)Linear Channels and Limiting Active Cables...... 283 14 6.8.8 EDR(25. 78125 Gb/s) Linear Channels and Limiting Active Cables......290 15 16 7.1 Introduction 291 18 7.1.1 Environmental Performance Requirements 291 19 7.1.2 Port and connector labeling 291 20 7.2 1X Interface 295 21 7.2.1 1X Board connector 295 22 7.3 micro GigaCN Interface 295 23 7.3.1 Mechanical requirements 295 24 7.3.2 4X Introduction 297 25 7.3.3 Electrical requirements 305 26 7.3.4 Environmental requirements 309 27 74 Pluggable Interface Connectors 310 28 7.4.1 Introduction ….310 29 7.4.2 Obsolete Pluggable Interface Connectors 311 30 7.5 4X QSFP+ Interface connectors 312 7.5.1 Introduction 312 32 7.5.2 Mechanical requirements 314 33 7.5.3 Electrical Requirements 330 34 7.5.4 Environmental and thermal requirements 337 35 7.5.5 Memory Map 338 36 7.6 Optical4 X QSFP+ Modules……,… 338 37 7.7 8X and 12Xmicro GigaCN Interface 338 38 39 7.7.1 ntroduction 338 40 7.7.2 Mechanical requirements 339 41 7.7.3 Electrical requirements 342 42 InfiniBand M Trade association Page 7 InfiniBand M architecture release 1.3 November 6. 2012 VOLUME 2- PHYSICAL SPECIFICATIONS Final release 7.74 Environmental requirements 352 CXP Interface 352 7.8.1 Introduction 国国 .“.....::: ..352 7.8.2 Mechanical requirements .354 7.8.3 Electrical Requirements 371 7.8.4 Environmental and thermal requirements ..375 7.8.5 T hermal Performance Ranges .376 7.8.6 CXP Housing Assembly Thermal Interfaces .377 7.8. 7 Mating of cXP module Host pCBs to CXP Electrical Connectors 377 7.8.8 CXP Memory Map 383 5678g11 7.9 Electrical interface cable assemblies 383 7.9. 1 Physical Requirements 383 12 7.9.2 Cable Shielding 386 7.9.3 1X Interface cable 387 14 7.94 Micro Gigacn interface cables 387 15 79.5 QSFP+ interface cables 403 16 7.9.6 CXP interface cables .410 18 19 8.1 Introduction 418 20 8.2 Voltage and Timing specification 418 21 8.2.1 Management interface voltage specification ∴418 22 8.2.2 Management Interface Timing Specification 419 23 8.3 Memory Interaction Specifications 421 24 8.3.1 Timing for Memory Transactions 421 25 8.3.2 Timing for Control and Status Functions 421 26 8.3.3 Timing for Squelch and Disable Functions 423 27 8.4 Device addressing and operation 423 28 8.5 QSFP+ Memory Map……… 426 29 8.6 Read/Write Functionality for CXP 438 30 86.1 CXP Memory Address Counter( Read AND Write Operations)……… 438 862 Read Operations( Current Address read)……… 32 438 33 8.6.3 Read Operations( Random read)….… .438 34 8.6.4 Read Operations(Sequential Read) 43 35 8.6.5 Write Operations(Byte Write) 440 36 8.6.6 Write Operations(Sequential Write) 441 37 8.6.7 Write Operations(Acknowledge Polling) 442 38 8.7 CXP Memory Map .443 39 40 9.1 41 Introduction 469 42 InfiniBand M Trade association Page 8 InfiniBand M architecture release 1.3 November 6. 2012 VOLUME 2- PHYSICAL SPECIFICATIONS Final release 9.2 Scope 469 9.3 Fiber Attachment Technology options 469 94 Fiber Attachment overview 472 9.4.1 Fiber Optic system Overview 472 9.4.2 1x System Overview -SDR, dDR & QDR 473 23456 9.4.3 4x System Overview 474 9.4.4 8x-SX Overview -sdr dDr ∴478 9.4.5 12X System Overview -SDR, DDR,& QDR 480 9.5 Optical Specifications 481 6789 9.5.1 Quiescent Condition 482 9.5.2 Optical signal polarity .483 11 Optical Transmitter Mask Compliance for links operating at 2.5 Gb/s&5.0 Gb/s483 12 9.5.4 Optical Transmitter Mask Compliance for links operating at 10.0 Gb/s 486 9.5.5 Optical Jitter Specification for links operating at 2.5 Gb/s and 5.0 Gb/s 487 14 9.5.6 Optical Jitter Specifications for links operating at 10.0 Gb/s 491 15 9.5.7 Bit to bit skew 492 16 9.5.8 1X SDR Links-at 2.5 Gb/s 493 9.59 1x DDR Links-at 5.0 Gb/s ∴499 18 9.5. 10 4X SDR Links-at 2.5 Gb/s 503 19 9.5.11 4X-DDR-SX Link ∴.506 20 9.5.12 8X-SX Links-at 2.5 Gb/s 508 21 9.5.1312×-SⅩ Links-at2.5Gb/s 508 22 9.5. 14 8X-DDR-SX and 12x-DDR-SX Links 1面国,E,B1E画 ,511 23 9.5.15 1x QDR Links 513 24 9.6 Optical Receptacle and Connector 514 25 9.6.1 1x Connector-LC 515 26 9.6.2 4x-SX Connector-Single MPO 517 27 9.6.3 4x LX Connector -SC .519 28 9.6.4 8x-SX Optical Receptacle and Connector 520 29 9.6.5 12X-SX Connector -Dual mPo 521 30 9.7 Fiber Optic Cable plant Specifications 523 9.7.1 Optical Fiber Specification 523 32 9.7.2 Modal bandwidth 524 33 9.7.3 Optical Passive Loss of Fiber Optic Cable 525 34 9.7.4 Fiber Optic Adapters and Splices 526 35 98 Signal conditioner in Optical transceiver 527 36 9.8. 1 Motivation for Signal conditioner 7 37 9.8.2 Signal Conditioner Implementation .528 38 9.9 Aux Power 533 39 40 9.9.1 Behavior in aux Power mode 533 41 9.9.2 Beaconing and Wake-up 533 42 InfiniBand M Trade association Page 9 InfiniBand M architecture release 1.3 November 6. 2012 VOLUME 2- PHYSICAL SPECIFICATIONS Final release 9.10 Optical Pluggable Modules 533 9. 10.1 1x Optical Pluggable Modules 533 9.10.2 4x Optical Pluggable Modules ∴533 9. 10.3 8x and 12X Optical Pluggable Modules 533 23456 A1.1 Background.… 535 A1.1.1 Compliance board design 535 A1.1.2 Compliance board calibration 535 8 A1.2 Test Setups 535 9 A1.2.1 Transmitter characterization 535 A1.2.2 Receiver characterization 536 A1.2.3 Cable characterization 12 8 A1.3 Compliance Boards-Electrical Specifications 539 14 A1.3. 1 Host Compliance Boards 541 15 A1.3.2 Module Compliance boards 542 16 A1.3.3 Combined Host Module Compliance Boards 543 A1.4 QSFP+ compliance boards-Mechanical Description 547 18 A1.4.1 QSFP+ Host Compliance board 547 19 A1.4.2 QSFP+ Module Compliance board 547 20 A1.5 CXP compliance boards-Mechanical Description 549 21 A1.5. 1 CXP Host Compliance board 549 22 A1.5.2 CXP Module Compliance board .551 23 A1.6 FDR Overall Link Budget for Linear Channels(Informative) 552 24 22 56 A2.1 Insertion loss fitting 553 27 A2. 2 Integrated Crosstalk Noise(ICN) 554 28 A2.3 Integrated Common Mode Conversion Noise(ICMCN) 556 29 333 012 33 34 35 33 7 38 3444 9012 InfiniBand M Trade association Page 10

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lingkongyihe 如果有卷1就更好了。
2016-03-31
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