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MH5000-871 Hardware Guide
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This document describes the hardware application interfaces and air interfaces provided by HUAWEI MH5000-871 LGA module. This document helps hardware engineers to understand the interface specifications, electrical features and related product information of the MH5000-871 LGA module.
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HUAWEI MH5000-871 LGA Module
Hardware Guide
Issue
03
Date
2020-06-17

Copyright © Huawei Technologies Co., Ltd. 2019. All rights reserved.
No part of this manual may be reproduced or transmitted in any form or by any means without prior written
consent of Huawei Technologies Co., Ltd. And its affiliates (“Huawei”).
The product described in this manual may include copyrighted software of Huawei and possible licensors.
Customers shall not in any manner reproduce, distribute, modify, decompile, disassemble, decrypt, extract,
reverse engineer, lease, assign, or sublicense the said software, unless such restrictions are prohibited by
applicable laws or such actions are approved by respective copyright holders.
Trademarks and Permissions
, , and are trademarks or registered trademarks of Huawei Technologies Co., Ltd.
LTE is a trade mark of ETSI.
Other trademarks, product, service and company names mentioned may be the property of their respective
owners.
Notice
Some features of the product and its accessories described herein rely on the software installed, capacities
and settings of local network, and therefore may not be activated or may be limited by local network operators
or network service providers.
Thus, the descriptions herein may not exactly match the product or its accessories which you purchase.
Huawei reserves the right to change or modify any information or specifications contained in this manual
without prior notice and without any liability.
DISCLAIMER
ALL CONTENTS OF THIS MANUAL ARE PROVIDED “AS IS”. EXCEPT AS REQUIRED BY APPLICABLE
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Customers shall comply with all applicable export or import laws and regulations and be responsible to obtain
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in this manual including the software and technical data therein.
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HUAWEI MH5000-871 LGA Module
Hardware Guide
About This Document
Issue 03 (2020-06-17)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
3
About This Document
Revision History
Document
Version
Date
Chapter
Descriptions
01
2019-07-25
-
Initial release
02
2019-10-18
3.2
Table 3-1 Added MIPI and GPIO pins
3.2
Table 3-1 ANT2 ANT3 direction is modified
as I/O
3.2
Table 3-1 Y28 pin name is modified as
GNSS_PPS_IN_A,Y27 pin name is modified
as GNSS_PPS_IN_C

HUAWEI MH5000-871 LGA Module
Hardware Guide
About This Document
Issue 03 (2020-06-17)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
4
Document
Version
Date
Chapter
Descriptions
03
2020-06-17
-
Refresh RF band information in chapter 1
Refresh module weight in chapter 2.2
Refresh normal operating temperature(-20℃
~70℃) for GSM bands in chapter 2.2
Refresh SMS and data services
specifications in chapter 2.2
Refresh module block diagram in chapter 2.3
Refresh LGA interface in chapter 3.2
Refresh wake-up pull-up resistor in chapter
3.4.6
Refresh USB3.1 in chapter 3.6
Refresh PCIE3.0 in chapter 3.15
Refresh RF conduction specifications in
chapter 4.4
Refresh antenna design in chapter 4.5
Refresh input voltage specifications in
chapter 5.5.1
Refresh the dimensions in chapter 6.4
Refresh layout design solution in chapter 6.6
Refresh thermal design solution in chapter
6.7
Refresh assembly processes in chapter 6.8
Added I2S function in chapter 3.8
Added band n1 information in chapter 4
Added packaging chapter 6.5
Added PCB sickness information in chapter
6.6

HUAWEI MH5000-871 LGA Module
Hardware Guide
Contents
Issue 03 (2020-06-17)
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
5
Contents
1 Introduction ........................................................................................................................... 8
2 Overall Description ............................................................................................................... 9
2.1 About This Chapter.......................................................................................................................... 9
2.2 Function Overview .......................................................................................................................... 9
2.3 Circuit Block Diagram .................................................................................................................... 10
2.4 Application Block Diagram............................................................................................................. 11
3 Description of the Application Interfaces ......................................................................... 13
3.1 About This Chapter........................................................................................................................ 13
3.2 LGA Interface ................................................................................................................................ 13
3.3 Power Interface ............................................................................................................................. 30
3.3.1 Overview............................................................................................................................... 30
3.3.2 Input Power Supply Interface................................................................................................ 31
3.3.3 Output Power Supply Interface ............................................................................................. 32
3.4 Control Signal Interface ................................................................................................................. 33
3.4.1 Overview............................................................................................................................... 33
3.4.2 POWER_ON_OFF Pin ......................................................................................................... 34
3.4.3 PS_HOLD Pin ....................................................................................................................... 35
3.4.4 RESETIN_N Pin ................................................................................................................... 35
3.4.5 RESETOUT_N Pin ............................................................................................................... 36
3.4.6 WAKEUP_SLEEP_IN Pin ..................................................................................................... 36
3.4.7 WAKEUP_SLEEP_OUT Pin ................................................................................................. 38
3.4.8 SLEEP_STATUS Pin ............................................................................................................ 38
3.5 UART and SPI Interface ................................................................................................................ 39
3.6 USB Interface ................................................................................................................................ 42
3.7 USIM Card Interface ..................................................................................................................... 42
3.8 Audio Interface .............................................................................................................................. 44
3.9 GPIO Interface .............................................................................................................................. 46
3.10 ADC Interface .............................................................................................................................. 47
3.11 GPS PPS Interface ...................................................................................................................... 48
3.12 JTAG Interface ............................................................................................................................ 48
3.13 I2C Interface................................................................................................................................ 49
3.14 SDIO Interface ............................................................................................................................ 49
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