AT24C02规格书_at24c这类存储最大多少资源-CSDN文库

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Features

• Low-voltage and Standard-voltage Operation

– 2.7 (V

= 2.7V to 5.5V)

– 1.8 (V

= 1.8V to 5.5V)

• Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),

1024 x 8 (8K) or 2048 x 8 (16K)

• Two-wire Serial Interface

• Schmitt Trigger, Filtered Inputs for Noise Suppression

• Bidirectional Data Transfer Protocol

• 100 kHz (1.8V) and 400 kHz (2.7V, 5V) Compatibility

• Write Protect Pin for Hardware Data Protection

• 8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes

• Partial Page Writes Allowed

• Self-timed Write Cycle (5 ms max)

• High-reliability

– Endurance: 1 Million Write Cycles

– Data Retention: 100 Years

• Automotive Grade and Lead-free/Halogen-free Devices Available

• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 5-lead SOT23,

8-lead TSSOP and 8-ball dBGA2 Packages

• Die Sales: Wafer Form, Waffle Pack and Bumped Wafers

Description

The AT24C01A/02/04/08A/16A provides 1024/2048/4096/8192/16384 bits of serial

electrically erasable and programmable read-only memory (EEPROM) organized as

128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many

industrial and commercial applications where low-power and low-voltage operation

are essential. The AT24C01A/02/04/08A/16A is available in space-saving 8-lead PDIP,

8-lead JEDEC SOIC, 8-lead MAP, 5-lead SOT23 (AT24C01A/AT24C02/AT24C04), 8-

lead TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial inter-

face. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to

5.5V) versions.

Table 1. Pin Configuration

Pin Name Function

A0 - A2 Address Inputs

SDA Serial Data

SCL Serial Clock Input

WP Write Protect

NC No Connect

GND Ground

VCC Power Supply

Two-wire

Serial EEPROM

1K (128 x 8)

2K (256 x 8)

4K (512 x 8)

8K (1024 x 8)

16K (2048 x 8)

AT24C01A

AT24C02

AT24C04

AT24C08A

AT24C16A

0180V–SEEPR–8/05

8-lead SOIC

GND

VCC

SCL

SDA

8-lead PDIP

GND

VCC

SCL

SDA

8-lead MAP

Bottom View

VCC

SCL

SDA

GND

5-lead SOT23

SCL

GND

SDA

VCC

8-ball dBGA2

Bottom View

VCC

SCL

SDA

GND

8-lead TSSOP

GND

VCC

SCL

SDA

AT24C01A/02/04/08A/16A

0180V–SEEPR–8/05

Pin Description SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each

EEPROM device and negative edge clock data out of each device.

SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is

open-drain driven and may be wire-ORed with any number of other open-drain or open-

collector devices.

DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device

address inputs that are hard wired for the AT24C01A and the AT24C02. As many as

eight 1K/2K devices may be addressed on a single bus system (device addressing is

discussed in detail under the Device Addressing section).

The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K

devices may be addressed on a single bus system. The A0 pin is a no connect.

The AT24C08A only uses the A2 input for hardwire addressing and a total of two 8K

devices may be addressed on a single bus system. The A0 and A1 pins are no

connects.

The AT24C16A does not use the device address pins, which limits the number of

devices on a single bus to one. The A0, A1 and A2 pins are no connects.

WRITE PROTECT (WP): The AT24C01A/02/04/08A/16A has a Write Protect pin that

provides hardware data protection. The Write Protect pin allows normal Read/Write

operations when connected to ground (GND). When the Write Protect pin is connected

to V

, the write protection feature is enabled and operates as shown in Table 2.

Table 2. Write Protect

Memory Organization AT24C01A, 1K SERIAL EEPROM: Internally organized with 16 pages of 8 bytes each,

the 1K requires a 7-bit data word address for random word addressing.

AT24C02, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each,

the 2K requires an 8-bit data word address for random word addressing.

AT24C04, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each,

the 4K requires a 9-bit data word address for random word addressing.

AT24C08A, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each,

the 8K requires a 10-bit data word address for random word addressing.

AT24C16A, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes

each, the 16K requires an 11-bit data word address for random word addressing.

WP Pin

Status

Part of the Array Protected

24C01A 24C02 24C04 24C08A 24C16A

At V

Full (1K)

Array

Full (2K)

Array

Full (4K)

Array

Full (8K)

Array

Full (16K)

Array

At GND Normal Read/Write Operations

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