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The Texas Instruments MSP430 family of ultra-low-power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code
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MSP430F23x0
www.ti.com
SLAS518E –AUGUST 2006– REVISED AUGUST 2011
MIXED SIGNAL MICROCONTROLLER
1
FEATURES
2
• Low Supply Voltage Range: 1.8 V to 3.6 V
• Universal Serial Communication Interface
• Ultra-Low Power Consumption – Enhanced UART Supporting Auto Baudrate
Detection (LIN)
– Active Mode: 270 µA at 1 MHz, 2.2 V
– IrDA Encoder and Decoder
– Standby Mode: 0.7 µA
– Synchronous SPI
– Off Mode (RAM Retention): 0.1 µA
– I
2
C™
• Ultra-Fast Wake-Up From Standby Mode in
Less Than 1 µs • Brownout Detector
• 16-Bit RISC Architecture, 62.5-ns Instruction • Serial Onboard Programming, No External
Cycle Time Programming Voltage Needed, Programmable
Code Protection by Security Fuse
• Basic Clock Module Configurations
• Bootstrap Loader
– Internal Frequencies up to 16 MHz With
Four Calibrated Frequencies to ±1% • On-Chip Emulation Module
– Internal Very-Low-Power Low-Frequency • Family Members Include:
(LF) Oscillator
– MSP430F2330
– 32-kHz Crystal
– 8KB + 256B Flash Memory
– High-Frequency (HF) Crystal up to 16 MHz
– 1KB RAM
– Resonator
– MSP430F2350
– External Digital Clock Source
– 16KB + 256B Flash Memory
– External Resistor
– 2KB RAM
• 16-Bit Timer_A With Three Capture/Compare
– MSP430F2370
Registers
– 32KB + 256B Flash Memory
• 16-Bit Timer_B With Three Capture/Compare
– 2KB RAM
Registers
• Available in 40-Pin QFN Package and 49-Pin
• On-Chip Comparator for Analog Signal
Die-Sized BGA Package (See Table 1)
Compare Function or Slope Analog-to-Digital
• For Complete Module Descriptions, See the
(A/D) Conversion
MSP430x2xx Family User's Guide (SLAU144)
DESCRIPTION
The Texas Instruments MSP430™ family of ultra-low-power microcontrollers consists of several devices featuring
different sets of peripherals targeted for various applications. The architecture, combined with five low-power
modes, is optimized to achieve extended battery life in portable measurement applications. The device features a
powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency.
The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 1 µs.
The MSP430F23x0 series is an ultra-low-power microcontroller with two built-in 16-bit timers, one universal serial
communication interface (USCI), a versatile analog comparator, and 32 I/O pins.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2MSP430 is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2006–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
MSP430F23x0
SLAS518E –AUGUST 2006– REVISED AUGUST 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Table 1. Available Options
PACKAGED DEVICES
(1)(2)
T
A
PLASTIC 49-PIN DSBGA PLASTIC 40-PIN QFN
(YFF) (RHA)
MSP430F2330IYFF MSP430F2330IRHA
-40°C to 85°C MSP430F2350IYFF MSP430F2350IRHA
MSP430F2370IYFF MSP430F2370IRHA
- MSP430F2330TRHA
-40°C to 105°C - MSP430F2350TRHA
- MSP430F2370TRHA
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
Development Tool Support
All MSP430 microcontrollers include an Embedded Emulation Module (EEM) that allows advanced debugging
and programming through easy-to-use development tools. Recommended hardware options include:
• Debugging and Programming Interface with Target Board
– MSP-FET430U23X0 (RHA package)
• Debugging and Programming Interface
– MSP-FET430UIF (USB)
– MSP-FET430PIF (Parallel Port)
• Target Board
– MSP-TS430QFN23X0 (RHA package)
• Production Programmer
– MSP-GANG430
2 Copyright © 2006–2011, Texas Instruments Incorporated
P4.4/TB1
21
22
23
24
25
26
27
28
29
P3.3/UCB0CLK/UCA0STE
P3.4/UCA0TXD/UCA0SIMO
P3.5/UCA0RXD/UCA0SOMI
P3.6
P3.7
P4.0/TB0
P4.1/TB1
P4.2/TB2
P4.3/TB0
AV
CC
31
32
33
34
35
36
37
38
39
P4.5/TB2
P4.6/TBOUTH/ACLK
P4.7/TBCLK
TDO/TDI
TDI/TCLK
TMS
TCK
RST/NMI
D/AV
SS
DV
CC
1
9
8
7
6
5
4
3
2
P1.6/TA1
P1.5/TA0
P1.4/SMCLK
P1.3/TA2
P1.2/TA1
P1.1/TA0
P1.0/TACLK
XOUT/P2.7/CA7
XIN/P2.6/CA6
P1.7/TA2
11
19
18
17
16
15
14
13
12
P3.2/UCB0SOMI/UCB0SCL
P3.1/UCB0SIMO/UCB0SDA
P3.0/UCB0STE/UCA0CLK
P2.5/R /CA5
OSC
P2.4/CA1/TA2
P2.3/CA0/TA1
P2.2/CAOUT/TA0/CA4
P2.1/TAINCLK/CA3
P2.0/ACLK/CA2
40
30
10
20
Exposed Thermal Pad
MSP430F23x0
www.ti.com
SLAS518E –AUGUST 2006– REVISED AUGUST 2011
Device Pinout, RHA Package
RHA PACKAGE
(TOP VIEW)
Copyright © 2006–2011, Texas Instruments Incorporated 3
A1 A2 A4A3 A5 A6 A7
B1 B2 B4B3 B5 B6 B7
C1 C2 C4C3 C5 C6 C7
D1 D2 D4D3 D5 D6 D7
E1 E2 E4E3 E5 E6 E7
F1 F2 F4F3 F5 F6 F7
G1 G2 G4G3 G5 G6 G7
MSP430F23x0
SLAS518E –AUGUST 2006– REVISED AUGUST 2011
www.ti.com
Device Pinout, YFF Package
YFF PACKAGE
(TOP VIEW)
Package Dimensions
The package dimensions for this YFF package are shown in the following table. See the package drawing at the
end of this data sheet for more details.
Table 2. YFF Package Dimensions
PACKAGED DEVICES D E
MSP430F2370IYFF
MSP430F2350IYFF 3.20 ± 0.05 mm 3.20 ± 0.05 mm
MSP430F2330IYFF
4 Copyright © 2006–2011, Texas Instruments Incorporated
Basic Clock
System+
Brownout
Protection
RST/NMI
DVCC D/AVSS
MCLK
Watchdog
WDT+
15-Bit
Timer_A3
3 CC
Registers
16MHz
CPU
incl. 16
Registers
Emulation
JTAG
Interface
Ports
P1/P2
2x8 I/O
Interrupt
capability
Comp_A+
8
Channels
Hardware
Multiplier
MPY,
MPYS,
MAC,
MACS
Timer_B3
3 CC
Registers
Ports
P3/P4
2x8 I/O
AVCC P1.x/P2.x
2x8
P3.x/P4.x
2x8
SMCLK
ACLK
MDB
MAB
XIN XOUT
RAM
2kB
2kB
1kB
Flash
32kB
16kB
8kB
USCI A0:
UART
IrDA, SPI
USCI B0:
SPI, I2C
MSP430F23x0
www.ti.com
SLAS518E –AUGUST 2006– REVISED AUGUST 2011
Functional Block Diagram
Copyright © 2006–2011, Texas Instruments Incorporated 5
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