Document Number:356037, Revision: 1.2 3
Intel Confidential
Table of Contents
1 Overview ............................................................................................................................7
1.1 General Debug Port Overview ..............................................................................7
1.2 Debug Port Design Reviews .................................................................................7
1.3 Depopulating debug port for Production Units ......................................................7
1.4 Scan-Chain Enumeration ......................................................................................8
1.5 General Guidelines................................................................................................8
1.6 Termination Resistors ...........................................................................................9
2 XDP Routing Guidelines...................................................................................................11
2.1 JTAG Routing Guidelines....................................................................................11
2.1.1 TDI - TDO Routing Guidelines - Dual Scan Chains ...............................11
2.1.2 TCK0 and TCK1 Routing........................................................................13
2.1.3 TMS Routing Guidelines ........................................................................13
2.1.4 TRSTn Routing Guidelines.....................................................................14
2.2 Observation (OBS) Port Routing Guidelines .......................................................14
2.2.1 Break Point Monitor (BPM) Routing Guidelines .....................................14
2.3 HOOK Pins Routing Guidelines ..........................................................................16
2.3.1 PWRGOOD (HOOK0) Routing Guidelines.............................................16
2.3.2 HOOK[1] Reserved ................................................................................16
2.3.3 HOOK[2] GPIO7.....................................................................................16
2.3.4 HOOK[3] Reserved ................................................................................16
2.3.5 ITPCLK/ITPCLK# (HOOK[4:5]) Routing Guidelines...............................16
2.3.6 RESET# (HOOK6) Routing Guidelines ..................................................17
2.3.7 DBR# (HOOK7) Routing Guidelines ......................................................17
2.3.8 XDP_Present#........................................................................................18
2.4 I2C* Routing Guidelines......................................................................................18
2.5 POWER...............................................................................................................18
2.5.1 VCC_OBS Pins ......................................................................................18
2.5.2 Ground ...................................................................................................18
3 XDP System Connection..................................................................................................19
4 XDP Mechanical Specifications........................................................................................21
5 XDP-SFF-24Pin Connector Option ..................................................................................23
5.1 XDP-SFF-24Pin Routing Guidelines ...................................................................23
5.2 XDP-SFF-24Pin Platform Connection.................................................................24
5.3 XDP-SFF-24Pin Mechanical Specifications ........................................................25
6 XDP-SSA Connector Option ............................................................................................29
6.1 XDP-SSA Routing Guidelines .............................................................................29
6.2 XDP-SSA Platform Connection...........................................................................29
A Appendix – Debug Port Interposer Considerations ..........................................................33
B Appendix – Terms and Definitions ...................................................................................35
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2012-04-13
20:14:34
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zjw26085932015-10-15不错 这种详细的资料正需要
文梓楩楠2014-06-13很不错，规范很详细，不过是英文版啊，我一开始还以为是中文版呢。
