[2011] Entropy Coders of the H.264AVC Standard Algorithms and VLSI Architectures

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[2011] Entropy Coders of the H.264AVC Standard Algorithms and VLSI Architectures
Xiaohua Tian Thinh M. Le. Yong Lian Entropy Coders of the h,264/Avc Standard Algorithms and vlsi architectures ②S pringer Dr Xiaohua tian Dr Thinh m. le National University of Singapore 11115 Boulevard cavendish Dept Electrical Computer Engineering #907 St-Laurent 4 Engineering drive 3 H4R 2M9 Canada 117576 Singapore Canada Singapore thinhle @ieee. org tianxiaohua@nus.edu. sg Prof Dr. Yong lian National University of Singapore Dept Electrical Computer Engineering 4 Engineering drive 3 117576 Singapore Si re eleliany nus.edu. sg ISSN1860-4862 ISBN978-3-642-14702-9 e-ISBN978-3-642-14703-6 DOI10.1007/978-3-642-14703-6 Springer Heidelberg Dordrecht London New York Library of Congress Control Number: 2010933787 O Springer-Verlag Berlin Heidelberg 2011 This work is subject to copyright. All rights are reserved, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting reproduction on microfilm or in any other way, and storage in data banks. Duplication of this publication or parts thereof is permitted only under the provisions of the German Copyright Law of September 9, 1965, in its current version, and permission for use must always be obtained from Springer. Violations are liable to prosecution under the German Copyright Law The use of general descriptive names, registered names, trademarks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use Cover design: WMXDesign GmbH, Heidelberg Printed on acid-free paper SpringerispartofSpringerScience+businessMedia(www.springer.com) y beloved Father, Mother, and Xi Xiaohua Tian To my wife, Du-Tram, and daughter Nha-Minh for their love and support Thinh m. Le To my wife, Dr. Bei hu, and daughters Vivian and alicia, for their love and Yong Lian Preface This work is an attempt to provide background of a typical video coding block and the associated design consideration and methodology for realizing such block in VLSI circuits. Readers may find this book helpful in how an algorithm can be mapped onto the corresponding circuits, and the trade-offs between implementing and not implementing an algorithm in hardware In this book, the entropy coding tools adopted by the H. 264/AvC video com pression standard are presented in both algorithms and VLsI architectures. The book has two parts. Part A includes a brief background on video compression, in which entropy compression is an influential and interdependent component; intro duction to the cavlc and cabac algorithms and their respective realized vlsi architectures. Part B comprises a design flow for a typical CABAC coder, with performance complexity analysis, design methodology, design consideration, and power reduction techniques. A WISHBONE System bus interface is also integrated into the design to enhance the portability of the CaBac encoder in a Soc-based video coding system. The material contained in this book was developed over several years of research and most recently, a research project of the same name. Citations of references in the book are included at appropriate places. Readers are referred to leading journals and well known conference proceedings(IEEE Transactions on Circuits and Systems for Video Technology, IEEE Transactions on Circuits and Systems, TEEE Transactions on Computers, IEEE Transactions on Multimedia; Proceedings of Ieee International Conference on Image processing Proceedings of Ieee International Conference on Acoustics, Speech and Signal Processing, Proceedings of International Conference on Application-specific Systems, Architectures ane Processors) as well as several other sources for advances in the field The authors are thankful to the various editors, especially the following individ uals: Shyam Parikkal Krishnamurthy for various software simulations, Xi Jiang for assistance in chip layout, and Trang T.T. Do for the word processing tasks Singapore Xiaohua Tian St-Laurent, QC, Canada Thinh m. le Singapore Yong lian Abstract The latest international video coding standard H.264/AvC has significantly improved coding performance and network friendliness. Two entropy coding tools: Context-based Adaptive variable length Coder(Cavlc) and Context-based Adaptive Binary Arithmetic Coder(Cabac) have been adopted in different profiles of the standard. In the baseline and Extended profiles, cavlc is adopted, while in the Main and higher profiles targeting high bit-rate and high definition services, CABAC is used. The Rate-Distortion Optimization (rdo) is another very important tool that significantly improves the coding performance of H. 264/AVC standard The first part of this book covers the theory behind entropy coding and especially CABAC. The second part of this book comprises a design flow for a typical cabac coder, with performance complexity analysis, design methodology, design consider ation, and power reduction techniques. A WISHBONE System bus interface is also integrated into the design to enhance the portability of the CABaC encoder in a Soc-based video coding system Compared to all other reported designs, this design supports most complete CABAC functions, including RDO and context model selection. The design pro cedure is Soc-based, targeting low complexity, high coding efficiency, and ease of system integration. The design achieves complete encoding of residual, prediction and control data with full support for RDo mode and negligible work left on the host for input data packaging; and low bandwidth on system bus compared to the reported designs. a full-pipelined top-level architecture is adopted in the proposed Cabac encoder, and constant coding throughput of i bin/cycle is achieved in different cod ing configurations. An efficient context access scheme is proposed to reduce context RAM access frequency and remove context model access delay, including tech niques of context line access and local buffering, and context memory reallocation The context RAM access frequency of the proposed encoder is significantly lower than that of designs with single context model access scheme and the design with small context model cache allocated. Unlike most reported designs, RDo related operations are fully supported in this Cabac encoder, including(a) coding state backup and restoration of context model, coding interval and coded syntax element (SE), and(b) coding rate counting and output of each RDO mode. Compared to the

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