Questions and Answers
Product Version Sigrity 2018
March 2019
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QandA
March 2019 3 Product Version Sigrity 2018
© 2019 Cadence Design Systems, Inc. All rights reserved.
System Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
How to Use This Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Additional Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Conventions Used in This Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
How to Contact Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
General Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1. How do you combine a chip package with a board into a single SPD model? . . . 3
2. How do I model via-holes in Allegro Sigrity? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3. How do I deal with Via Placement Errors and Trace Node Placement Errors? . . 4
4. How do I deal with the component library? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5. How do I globally increase the special void criteria? . . . . . . . . . . . . . . . . . . . . . . . 6
6. How do I change holes to special voids? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7. How should I adjust the mesh to model serpentine shapes? . . . . . . . . . . . . . . . . 10
8. How do I quickly link a partial circuit node to multiple package nodes? . . . . . . . . 11
9. How do I hook ports to multiple nodes in PowerSI? . . . . . . . . . . . . . . . . . . . . . . . 14
10. How do I extend multiple vias/nodes between a package and PCB? . . . . . . . . . 15
11. Is the component mounting inductance being considered in Allegro Sigrity? . . . 15
SPEED2000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
1. How do I deal with the peak/average distribution button in SPDSIM? . . . . . . . . 17
2. How do I use Origin 5.0 to import SPDSIM .cur data file and how do I load a .cur file
into Origin? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3. How do I choose a Gaussian source to get frequency domain results in SPEED2000?
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4. How do I generate and plot eye diagrams from SPEED2000 output results? . . . 19
5. Why is the maximum value of my time-domain signal only 1.6e-6 after the Fast Fourier
Transform, when my time-domain signal has an amplitude of 1.2V? and what are the units
when I look at my voltage data in the frequency-domain? . . . . . . . . . . . . . . . . . . . . 19
6. How can I fix error 4010, the “a cross reference” problem?
. . . . . . . . . . . . . . . . 20
Broadband SPICE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
1. How do I deal with small glitches in waveform and “timestep too small” error message
during an HSPICE simulation using BBS models? . . . . . . . . . . . . . . . . . . . . . . . . . . 21
General Questions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Contents
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March 2019 4 Product Version Sigrity 2018
© 2019 Cadence Design Systems, Inc. All rights reserved.
1. Is the anti-pad considered in Allegro Sigrity? . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2. What is the rule for displaying via pads and anti-pads? . . . . . . . . . . . . . . . . . . . . . 23
3. When will “Enhanced Via Pad/Anti-Pad Model” be applied?
. . . . . . . . . . . . . . . . . 24
SPEED2000
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
1. Why use Gaussian source to calculate input impedance in SPEED2000? . . . . . 24
2. How do I estimate the simulation memory requirement by SPDSIM? . . . . . . . . . 25
3. How do I deal with capacitive coupling between vias? . . . . . . . . . . . . . . . . . . . . 25
4. How does SPEED2000 deal with return path discontinuity? . . . . . . . . . . . . . . . . 27
5. How does SPEED2000 deal with gap? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PowerSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
1. What electrical effects are ignored when interplane coupling is not included in the
simulation? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
QandA
March 2019 1 Product Version Sigrity 2018
© 2019 Cadence Design Systems, Inc. All rights reserved.
1
Introduction
Welcome to Questions & Answers. You asked and we answered. This document includes
questions asked by you, our customers.
System Requirements
Please refer to Installation Guide to check the system requirements.
How to Use This Guide
Questions & Answers is divided into sections:
❑ empirical
❑ theoretical
Each section includes questions asked by our customers. The answers include examples,
when needed.
Additional Documentation
■ Translators User’s Guide describes translations from various types of board and
package file formats to Sigrity’s SPD format.
■ PowerSI User’s Guide describes in detail the features and functionality of PowerSI.
Conventions Used in This Guide
