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TI-HD3SS0001.pdf
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DP开关
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Control
Logic
2:1 pair
MUX
R
PD
LSRX
LSTX
ML1(n)_IN
ML1(p)_IN
R
PU
V
DD
ML1(n)_OUT
ML1(p)_OUT
CAD_OUT
CAD_IN
HPD_OUT HPD_IN
3:1 pair
MUX
10G(p)
10G(n)
10G_RX1(p)
10G_RX1(n)
AUX(p)
AUX(n)
DDC_SCL
DDC_SDA
R2
V
DD
R1
TRI#
DP_EN#
10G_EN
HD3SS0001
www.ti.com
SLAS827 –SEPTEMBER 2013
10.3Gbps Thunderbolt™ Port and DisplayPort ™ Switch
Check for Samples: HD3SS0001
The MUXs are controlled by 4 input pins: TRI#,
1
FEATURES
DP_EN#, 10G_EN, and CAD_IN (cable detect from
23
• Compatible with Thunderbolt™ Technology
the connector). The HD3SS0001 is packaged in a
Electrical Standards and DisplayPort ™1.2a
small 3x3mm 24-pin QFN, operates from a single
• Wide –3dB Differential Bandwidth of Over
3.3V supply, and supports an ambient temperature
range of –40°C to 85°C.
10GHz on 10G Path
• Supports DP and DP++ Configurations
sp
• Handles HPD (5V tolerant) and Cable Detect
FUNCTIONAL DIAGRAM
• Supports AUX and DDC MUX
• Excellent Dynamic Characteristics (on 10G
path, typical values at 5GHz):
– Crosstalk = –35dB
– Off-Isolation = –24dB
– Insertion Loss = –1.5dB
– Return Loss = –20dB
– Intra-pair Skew Added < 4ps
• Single 3.3V Power Supply
• Small 3x3mm 24-Pin QFN Package
• Low Power Consumption
– 3.3mW Typical Active Power
– 80 µW Typical Detect Mode
DESCRIPTION
The HD3SS0001 is a high-speed passive-switch
device with integrated buffers and resistors, designed
to support Thunderbolt™ technology, DisplayPort,
and Dual Mode DisplayPort. The 10G path supports a
high 10GHz bandwidth and excellent loss
characteristics, while the DisplayPort path supports
5.4Gbps.
The integrated 3-pairs to 1-pair multiplexer (3:1 MUX)
switches between DDC, AUX, and 10.3Gbps signals.
The integrated 2-pairs to 1-pair multiplexer (2:1 MUX)
switches between the Thunderbolt™ technology Low
Speed UART transmit/receive pair and DisplayPort
Main Link 1.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Thunderbolt is a trademark of Intel Corp.
3DisplayPort is a trademark of VESA Standards Association.
PRODUCTION DATA information is current as of publication date.
Copyright © 2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Interface
Controller
Pin 4
DP ML1
10G_RX1
AUX
Thunderbolt™
Controller
Pin 2
LSTX
LSRX
AUX(n)
AUX(p)
CAD_OUT
HPD_OUT
10G(p)
10G(n)
10G_RX1(n)
10G_RX1(p)
DDC_SDA
DDC_SCL
ML1(p)_OUT
ML1(n)_OUTML1(n)_IN
ML1(p)_IN
CAD_IN
HPD_IN
TRI#
DP_EN#
10G_EN
Pin 9
Pin 11
Pin 16
Pin 18
mDP /
Thunderbolt™
Connector
HD3SS0001
Thunderbolt™ Port
and DisplayPort™
Switch
HD3SS0001
SLAS827 –SEPTEMBER 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
TYPICAL APPLICATION
TRUTH TABLE
LOGICAL INPUT TO SET
(1)
EFFECT
MODE
2:1 MUX 3:1 MUX PULL-UP RESISTOR
TRI# DP_EN# 10G_EN CAD_IN
SELECTION
(2)
SELECTION
(2)
on 10G(n)
1 1 1 X LS 10G Disconnected
Thunderbolt™
Protocol
0 1 1 X LS Tri-stated Disconnected
1 0 0 0 ML AUX Connected
DisplayPort
0 0 0 0 Tri-Stated Tri-stated Connected
1 0 0 1 ML DDC Connected
TMDS
0 0 0 1 Tri-Stated Tri-stated Connected
Detect Mode X 1 0 X LS Tri-Stated Connected
[Invalid] X 0 1 X Tri-Stated Tri-Stated Disconnected
(1) “X” = Don’t Care.
(2) MUX Selection names are abbreviated.
2 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated
Product Folder Links :HD3SS0001
GND
1
0G
(n)
1
0G
(p)
G
ND
M
L1(n)_OUT
M
L1(p)_OUT
21
1
0G
_RX
1(n)
1
0G_
RX
1(p)
GND
ML
1
(n)_IN
ML
1
(p)_IN
9
24 18
126
TRI# CAD_IN
DP_EN# HPD_OUT
HPD_IN
CAD_OUT
10G_EN
LSTX
LSRX
15
AUX(n)
AUX(p)
VDD
DDC_SDA
DDC_SCL
3
17
16
3:1 2:1
1
2
4
5
7 8
14
13
11
10
20 1923 22
HD3SS0001
www.ti.com
SLAS827 –SEPTEMBER 2013
PACKAGE PINOUT
(TOP VIEW)
MUX PIN MAPPING
(1)
CONTROLLER-SIDE PIN Connector-Side Pin
AUX(n)
DDC_SDA 10G(n)
10G_RX1(n)
AUX(p)
DDC_SCL 10G(p)
10G_RX1(p)
ML1(p)_IN
ML1(p)_OUT
LSTX
ML1(n)_IN
ML1(n)_OUT
LSRX
(1) NOTE: The HD3SS0001 can tolerate polarity inversions for the
differential signals denoted by the (p) and (n) terminology, to ease
potential board routing issues. LSTX/LSRX cannot be swapped,
since LSRX is buffered and therefore unidirectional. Also, note that
the integrated pullup on 10G(n) and the integrated pulldown on
10G(p) cannot be swapped.
Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links :HD3SS0001
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