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DS90UB914A-Q1
ZHCSEY3D –APRIL 2016–REVISED OCTOBER 2019
www.ti.com.cn
版权 © 2016–2019, Texas Instruments Incorporated
目目录录
1 特特性性.......................................................................... 1
2 应应用用.......................................................................... 1
3 说说明明.......................................................................... 1
4 修修订订历历史史记记录录 ........................................................... 2
5 Device Comparison Table..................................... 4
6 Pin Configuration and Functions......................... 5
7 Specifications......................................................... 9
7.1 Absolute Maximum Ratings ...................................... 9
7.2 ESD Ratings.............................................................. 9
7.3 Recommended Operating Conditions....................... 9
7.4 Thermal Information ................................................ 10
7.5 Electrical Characteristics ........................................ 10
7.6 AC Timing Specifications (SCL, SDA) - I
2
C-
Compatible............................................................... 14
7.7 Bidirectional Control Bus DC Timing Specifications
(SCL, SDA) - I
2
C-Compatible ................................. 15
7.8 Deserializer Switching Characteristics.................... 15
7.9 Typical Characteristics ............................................ 17
8 Parameter Measurement Information ................ 17
8.1 Timing Diagrams and Test Circuits......................... 17
9 Detailed Description ............................................ 21
9.1 Overview ................................................................. 21
9.2 Functional Block Diagram ....................................... 22
9.3 Feature Description................................................. 22
9.4 Device Functional Modes........................................ 27
9.5 Programming .......................................................... 33
9.6 Register Maps ......................................................... 38
10 Application and Implementation........................ 49
10.1 Application Information.......................................... 49
10.2 Typical Applications .............................................. 53
11 Power Supply Recommendations ..................... 57
12 Layout................................................................... 58
12.1 Layout Guidelines ................................................. 58
12.2 Layout Example .................................................... 59
13 器器件件和和文文档档支支持持 ..................................................... 61
13.1 文档支持 ............................................................... 61
13.2 接收文档更新通知 ................................................. 61
13.3 社区资源................................................................ 61
13.4 商标 ....................................................................... 61
13.5 静电放电警告......................................................... 61
13.6 Glossary................................................................ 61
14 机机械械、、封封装装和和可可订订购购信信息息....................................... 61
4 修修订订历历史史记记录录
Changes from Revision C (November 2018) to Revision D Page
• Added tDLH and tDHL to Output Load and Transition Times diagram................................................................................ 18
• Added 953A in the list of compatible serializers................................................................................................................... 21
• Changed text in MODE Pin Configuration figure from "Serializer" to "Deserializer" ............................................................ 29
• Clarified bit descriptions for registers 0x1D-0x1E bits 4 and 0............................................................................................. 44
• Added timing diagram and data table for PDB to I2C ready delay ...................................................................................... 51
Changes from Revision B (October 2016) to Revision C Page
• Clarified when PCLK becomes active with respect to LOCK ................................................................................................ 6
• Added Power Over Coax supply noise to the recommended operating conditions table ..................................................... 9
• Corrected to t
DLH
and t
DHL
for data low-to-high and high-to-low transition time ................................................................... 15
• Moved the timing diagrams to the Parameter Measurement Information section................................................................ 17
• Added reference to compatibility with DS90UB953-Q1/935-Q1 serializers ........................................................................ 21
• Updated pullup and pulldown resistor to R
1
and R
2
in MODE pin configuration diagram ................................................... 29
• Updated register "TYPE" column per legend ...................................................................................................................... 38
• Added type and default value to the reserved register bits that were missing this information .......................................... 38
Changes from Revision A (June 2016) to Revision B Page
• Added Back Channel Line Rate specification; also added footnote for clarification between MHz and Mbps distinction. .. 11
• Revised back channel VOD specification from 175mV to 182 mV. .................................................................................... 11
• Removed 'ns' unit from specifications referencing period in units of T. ............................................................................... 15
• Revise Deserializer Delay specification due to the swapped information. .......................................................................... 16
• Revised jitter tolerance curve to be for typical system IJT configuration with DS90UB913A linked to DS90UB914A. ...... 17
