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

      

      

SCDS133A −SEPTEMBER 2003 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Undershoot Protection for Off-Isolation on

A and B Ports Up To −2 V

D Integrated Diode to V

Provides 5-V Input

Down To 3.3-V Output Level Shift

D Bidirectional Data Flow, With Near-Zero

Propagation Delay

D Low ON-State Resistance (r

)

Characteristics (r

= 3 Ω Typical)

D Low Input/Output Capacitance Minimizes

Loading and Signal Distortion

io(OFF)

= 5 pF Typical)

D Data and Control Inputs Provide

Undershoot Clamp Diodes

D V

Operating Range From 4.5 V to 5.5 V

D Data I/Os Support 0 to 5-V Signaling Levels

(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)

D Control Inputs Can be Driven by TTL or

5-V/3.3-V CMOS Outputs

D I

off

Supports Partial-Power-Down Mode

Operation

D Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

D ESD Performance Tested Per JESD 22

− 2000-V Human-Body Model

(A114-B, Class II)

− 1000-V Charged-Device Model (C101)

D Supports Both Digital and Analog

Applications: Memory Interleaving, Bus

Isolation, Low-Distortion Signal Gating

DB, DBQ, DGV, DW, OR PW PACKAGE

(TOP VIEW)

1OE

1B1

1A1

1A2

1B2

1B3

1A3

1A4

1B4

1B5

1A5

GND

2B5

2A5

2A4

2B4

2B3

2A3

2A2

2B2

2B1

2A1

2OE

description/ordering information

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

SOIC − DW

Tube SN74CBTD3384CDW

CBTD3384C

SOIC − DW

Tape and reel SN74CBTD3384CDWR

CBTD3384C

SSOP − DB

Tube SN74CBTD3384CDB

CC384C

−40°C to 85°C

SSOP − DB

Tape and reel SN74CBTD3384CDBR

CC384C

−40

C to 85

SSOP (QSOP) − DBQ Tape and reel SN74CBTD3384CDBQR CBTD3384C

TSSOP − PW

Tube SN74CBTD3384CPW

CC384C

TSSOP − PW

Tape and reel SN74CBTD3384CPWR

CC384C

TVSOP − DGV Tape and reel SN74CBTD3384CDGVR CC384C

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.



      

      

SCDS133A −SEPTEMBER 2003 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

simplified schematic, each FET switch (SW)

†

EN is the internal enable signal applied to the switch.

Undershoot

Protection Circuit

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

‡

Supply voltage range, V

−0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Control input voltage range, V

(see Notes 1 and 2) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Switch I/O voltage range, V

I/O

(see Notes 1, 2, and 3) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Control input clamp current, I

< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I/O port clamp current, I

I/OK

I/O

< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

ON-state switch current, I

I/O

(see Note 4) ±128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through V

or GND terminals ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θ

(see Note 5): DB package 63°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DBQ package 61°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DGV package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DW package 46°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package 88°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

‡

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltages are with respect to ground unless otherwise specified.

2. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

3. V

and V

are used to denote specific conditions for V

I/O

4. I

and I

are used to denote specific conditions for I

I/O

5. The package thermal impedance is calculated in accordance with JESD 51-7.

recommended operating conditions (see Notes 6 and 7)

MIN MAX UNIT

Supply voltage 4.5 5.5 V

High-level control input voltage 2 5.5 V

Low-level control input voltage 0 0.8 V

I/O

Data input/output voltage 0 5.5 V

Operating free-air temperature −40 85 °C

NOTES: 6. All unused control inputs of the device must be held at V

or GND to ensure proper device operation. Refer to the TI application

report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

7. In applications with fast edge rates, multiple outputs switching, and operating at high frequencies, the output may have little or no

level-shifting effect.



      

      

SCDS133A −SEPTEMBER 2003 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP

†

MAX UNIT

Control inputs V

= 4.5 V, I

= −18 mA −1.8 V

IKU

Data inputs V

= 5 V,

0 mA > I

≥ −50 mA,

= V

or GND,

Switch OFF −2 V

See Figures 4 and 5

Control inputs V

= 5.5 V, V

= V

or GND ±1 µA

‡

= 5.5 V,

= 0 to 5.5 V,

= 0,

Switch OFF,

= V

or GND

±10 µA

off

= 0, V

= 0 to 5.5 V, V

= 0 10 µA

= 5.5 V,

I/O

= 0,

= V

or GND,

Switch ON or OFF 1.5 mA

∆I

Control inputs V

= 5.5 V, One input at 3.4 V, Other inputs at V

or GND 2.5 mA

Control inputs V

= 3 V or 0 3.5 pF

io(OFF)

I/O

= 3 V or 0, Switch OFF, V

= V

or GND 5 pF

io(ON)

I/O

= 3 V or 0, Switch ON, V

= V

or GND 12.5 pF

= 0

= 64 mA 3 6

= 4.5 V

= 0

= 30 mA 3 6

Ω

= 4.5 V

= 2.4 V, I

= −15 mA 8 20

and I

refer to control inputs. V

, V

, I

, and I

refer to data pins.

†

All typical values are at V

= 5 V (unless otherwise noted), T

= 25°C.

‡

For I/O ports, the parameter I

includes the input leakage current.

This is the increase in supply current for each input that is at the specified voltage level, rather than V

or GND.

Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by

the lower of the voltages of the two (A or B) terminals.

switching characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Figure 3)

PARAMETER

FROM

(INPUT)

(OUTPUT)

= 5 V

± 0.5 V

UNIT

PARAMETER

(INPUT)

(OUTPUT)

MIN MAX

UNIT

A or B B or A 0.15 ns

A or B 1.5 4.8 ns

dis

A or B 1.5 4.8 ns

The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance,

when driven by an ideal voltage source (zero output impedance).

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