
SN74CBTH16211
24-BIT FET BUS SWITCH
WITH BUS HOLD
SCDS062C – JUNE 1998 – REVISED NOVEMBER 2001
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
5-Ω Switch Connection Between Two Ports
D
TTL-Compatible Input Levels
D
Bus Hold on Data Inputs/Outputs
Eliminates the Need for External
Pullup/Pulldown Resistors
description
The SN74CBTH16211 provides 24 bits of
high-speed TTL-compatible bus switching. The
low on-state resistance of the switch allows
connections to be made with minimal propagation
delay.
The device is organized as dual 12-bit bus
switches with separate output-enable (OE
)
inputs. It can be used as two 12-bit bus switches
or one 24-bit bus switch. When OE
is low, the
associated 12-bit bus switch is on, and the A port
is connected to the B port. When OE
is high, the
switch is open, and a high-impedance state exists
between the two ports.
Active bus-hold circuitry is provided to hold
unused or floating A and B ports at a valid logic
level.
To ensure the high-impedance state during power
up or power down, OE
should be tied to V
CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
Tube SN74CBTH16211DL
–
Tape and reel SN74CBTH16211DLR
–
TSSOP – DGG Tape and reel SN74CBTH16211DGGR CBTH16211
TVSOP – DGV Tape and reel SN74CBTH16211DGVR CYH211
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
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NC
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
1A11
1A12
2A1
2A2
V
CC
2A3
GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2A11
2A12
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
1B11
1B12
2B1
2B2
2B3
GND
2B4
2B5
2B6
2B7
2B8
2B9
2B10
2B11
2B12
NC – No internal connection
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