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SCDS043I − DECEMBER 1997 − REVISED OCTOBER 2003
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Member of the Texas Instruments
Widebus Family
D 5-Ω Switch Connection Between Two Ports
D Rail-to-Rail Switching on Data I/O Ports
D I
off
Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
description/ordering information
The SN74CBTLV16211 provides 24 bits of
high-speed bus switching. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay.
The device is organized as dual 12-bit bus
switches with separate output-enable (OE
)
inputs. It can be used as two 12-bit bus switches
or as one 24-bit bus switch. When OE
is low, the
associated 12-bit bus switch is on, and port A is
connected to port B. When OE
is high, the switch
is open, and the high-impedance state exists
between the two ports.
This device is fully specified for
partial-power-down applications using I
off
. The I
off
feature ensures that damaging current will not
backflow through the device when it is powered
down. The device has isolation during power off.
To ensure the high-impedance state during power
up or power down, OE
should be tied to V
CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP − DL
Tube SN74CBTLV16211DL
CBTLV16211
−40°C to 85°C
SSOP − DL
Tape and reel SN74CBTLV16211DLR
CBTLV16211
−40
°
C to 85
°
C
TSSOP − DGG Tape and reel SN74CBTLV16211GR CBTLV16211
TVSOP − DGV Tape and reel SN74CBTLV16211VR CN211
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
!" # $%&" !# '%()$!" *!"&+
*%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"#
#"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*&
"&#"0 !)) '!!&"&#+
Copyright 2003, Texas Instruments Incorporated
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
NC
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
1A11
1A12
2A1
2A2
V
CC
2A3
GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2A11
2A12
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
1B11
1B12
2B1
2B2
2B3
GND
2B4
2B5
2B6
2B7
2B8
2B9
2B10
2B11
2B12
NC − No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.

SCDS043I − DECEMBER 1997 − REVISED OCTOBER 2003
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
(each 12-bit bus switch)
INPUT
OE
FUNCTION
L A port = B port
H Disconnect
logic diagram (positive logic)
1A1
SW
1B1
1A12
1OE
SW
1B12
2A1
SW
2B1
2A12
2OE
SW
2B12
2
14
56
15
28
55
54
42
41
29
simplified schematic, each FET switch
A
(OE)
B

SCDS043I − DECEMBER 1997 − REVISED OCTOBER 2003
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage range, V
CC
−0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1) −0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 2): DGG package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 48°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 56°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN MAX UNIT
V
CC
Supply voltage 2.3 3.6 V
V
IH
High-level control input voltage
V
CC
= 2.3 V to 2.7 V 1.7
V
V
IH
High-level control input voltage
V
CC
= 2.7 V to 3.6 V
2
V
V
IL
Low-level control input voltage
V
CC
= 2.3 V to 2.7 V 0.7
V
V
IL
Low-level control input voltage
V
CC
= 2.7 V to 3.6 V
0.8
V
T
A
Operating free-air temperature −40 85 °C
NOTE 3: All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

SCDS043I − DECEMBER 1997 − REVISED OCTOBER 2003
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
†
MAX UNIT
V
IK
V
CC
= 3 V, I
I
= −18 mA −1.2 V
I
I
V
CC
= 3.6 V, V
I
= V
CC
or GND ±1 µA
I
off
V
CC
= 0, V
I
or V
O
= 0 to 3.6 V 10 µA
I
CC
V
CC
= 3.6 V, I
O
= 0, V
I
= V
CC
or GND 10 µA
∆I
CC
‡
Control inputs V
CC
= 3.6 V, One input at 3 V, Other inputs at V
CC
or GND 300 µA
C
i
Control inputs V
I
= 3.3 V or 0 4.5 pF
C
io(OFF)
V
O
= 3.3 V or 0, OE = V
CC
6.5 pF
V
CC
= 2.3 V,
V
I
= 0
I
I
= 64 mA 5 8
V
CC
= 2.3 V,
TYP at V
CC
= 2.5 V
V
I
= 0
I
I
= 24 mA 5 8
r
on
§
TYP at V
CC
= 2.5 V
V
I
= 1.7 V, I
I
= 15 mA 27 40
Ω
r
on
§
V
I
= 0
I
I
= 64 mA 5 7
Ω
V
CC
= 3 V
V
I
= 0
I
I
= 24 mA 5 7
V
CC
= 3 V
V
I
= 2.4 V, I
I
= 15 mA 10 15
†
All typical values are at V
CC
= 3.3 V (unless otherwise noted), T
A
= 25°C.
‡
This is the increase in supply current for each input that is at the specified voltage level, rather than V
CC
or GND.
§
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
V
CC
= 2.5 V
± 0.2 V
V
CC
= 3.3 V
± 0.3 V
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN MAX MIN MAX
UNIT
t
pd
¶
A or B B or A 0.15 0.25 ns
t
en
OE A or B 1 7 1 6.2 ns
t
dis
OE A or B 1 7.2 1 7.7 ns
¶
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
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