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TI-TSU8111.pdf
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ISET Curent Setting in Register 22h (mA)
Actual LDO Output Current (mA)
0 100 200 300 400 500 600 700 800 900 1000
0
100
200
300
400
500
600
700
800
900
1000
D001
-40°C
25°C
85°C
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TSU8111
ZHCSAE4A –SEPTEMBER 2012–REVISED AUGUST 2014
TSU8111 具具有有单单节节充充电电器器的的双双路路 SP2T USB 2.0 高高速速开开关关
1 特特性性 2 应应用用范范围围
1
• 双单刀双掷 (SP2T) USB 2.0 高速开关
• 移动电话
• 上网本/笔记本电脑
– UART 路径支持 UART 或 USB 2.0 高速信号
• 台式机
• 集成单节充电器
• 便携式手持设备
– 集成低压降线性稳压器 (LDO)
– 充电电压稳压精度 1%
3 说说明明
– 充电电流精度 8%
TSU8111是一款具有集成线性充电器的双 SP2T 微型
– 针对壁式适配器的高达 950mA 的可编程充电电
USB 开关。 由于此器件集成有充电器,因此无需配备
流限制
外部充电器 IC,从而节省了成本与电路板空间。 该器
• 充电器检测符合 USB 电池充电规范 v1.1 (BCv1.1)
件可通过 USB 端口或专用充电器供电运行,并支持高
– VBUS 检测
达 950mA 的充电电流。 连接该器件后,将通过 VBAT
– 数据接触侦测
或 VBUS 为其供电。 TSU8111 可检测与 BCv1.1 标
– 主和副侦测
准兼容的充电器以及使用 ID 电阻的附件。 USB 开关
– 支持 USB 充电器(DCP、CDP、SDP)
矩阵既可以通过自动检测来控制,也可以通过 I
2
C 手动
• 可在 ID 引脚上进行 5 位附件检测
进行控制。
– 按附件类型自动切换
• I
2
C 接口
器器件件信信息息
(1)
– 手动切换功能
部部件件号号 封封装装 封封装装尺尺寸寸((标标称称值值))
– 连接和断开时产生中断
TSU8111 DSBGA (20) 2.14mm x 1.76mm
– 支持制造中使用的控制信号(JIG,BOOT)
(1) 如需了解所有可用封装,请参见数据表末尾的可订购产品附
录。
• 具有过压保护功能的 VBUS 引脚的容差为 28V
• 针对输出电流控制的热调节和热关断保护
整整个个器器件件温温度度范范围围内内的的实实际际快快速速充充电电电电流流与与寄寄存存器器电电阻阻
• JESD 22 ESD 性能
设设置置间间的的关关系系
– 12kV 人体模型
(VBUS/DP_CON/DM_CON/ID_CON)
– 2kV 人体模型(所有其他引脚)
• IEC ESD 性能
– ±4kV 接触放电 (IEC 61000-4-
2)(VBUS/DP_CON/DM_CON/ID_CON 接地
(GND))
• 浪涌保护(VBUS/DP_CON/DM_CON/ID_CON 接
地)
– 无需使用外部元件即可保护 USB 连接器引脚
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
English Data Sheet: SCDS335
TSU8111
ZHCSAE4A –SEPTEMBER 2012–REVISED AUGUST 2014
www.ti.com.cn
目目录录
7.3 Feature Description................................................. 10
1 特特性性.......................................................................... 1
7.4 Device Functional Modes........................................ 11
2 应应用用范范围围................................................................... 1
7.5 Programming .......................................................... 12
3 说说明明.......................................................................... 1
7.6 Register Map........................................................... 16
4 修修订订历历史史记记录录 ........................................................... 2
8 Application and Implementation ........................ 25
5 Pin Configuration and Functions......................... 3
8.1 Application Information............................................ 25
6 Specifications......................................................... 4
8.2 Typical Application ................................................. 25
6.1 Absolute Maximum Ratings ...................................... 4
9 Power Supply Recommendations...................... 26
6.2 Handling Ratings ...................................................... 4
10 Layout................................................................... 27
6.3 Recommended Operating Conditions....................... 5
10.1 Layout Guidelines ................................................. 27
6.4 Thermal Information.................................................. 5
10.2 Layout Example .................................................... 27
6.5 Electrical Characteristics........................................... 5
11 器器件件和和文文档档支支持持 ..................................................... 28
6.6 Timing Requirements ............................................... 8
11.1 Trademarks........................................................... 28
6.7 Switching Characteristics.......................................... 8
11.2 Electrostatic Discharge Caution............................ 28
6.8 Typical Characteristics.............................................. 8
11.3 术语表 ................................................................... 28
7 Detailed Description.............................................. 9
12 机机械械封封装装和和可可订订购购信信息息 .......................................... 28
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
4 修修订订历历史史记记录录
Changes from Original (September 2012) to Revision A Page
• 已更改 本数据表至最新的 SDS 格式并替换了所有文本、表格和图。 ................................................................................... 1
2 Copyright © 2012–2014, Texas Instruments Incorporated
E
D
C
B
A
123
YFP Package
(TOP VIEW)
E
D
C
B
A
1 2 3 4
YFP Package
(BOTTOM VIEW)
4
TSU8111
www.ti.com.cn
ZHCSAE4A –SEPTEMBER 2012–REVISED AUGUST 2014
5 Pin Configuration and Functions
Pin Functions
PIN
I/O DESCRIPTION
NAME NO.
BOOT B2 O BOOT mode used for factory test modes. Push-pull output (active high)
DM_CON C4 I/O USB DM connected to USB receptacle
DM_HT D1 I/O USB DM on device side
DP_CON D4 I/O USB DP connected to USB receptacle
DP_HT E1 I/O USB DP on device side
GND A2, D3 — Ground
ID_CON E4 I/O USB ID connected to USB receptacle
INTB C3 O Interrupt to host. Push-pull output (active high)
JIG C2 O JIG detection used for factory test modes. Open-drain output (active low)
RxD C1 I/O UART Rx – capable of passing USB 2.0 HS signals
SCL E3 I I
2
C clock
SDA E2 I/O I
2
C data
TxD B1 I/O UART Tx – capable of passing USB 2.0 HS signals
VBAT A3, B3 I Supply voltage from battery
VBUS A4, B4 I Supply voltage from micro-USB connector. Charger is enabled when this supply is present.
VDDIO D2 I I
2
C and interrupt interface logic supply voltage
VLDO A1 O Low dropout regulator (LDO) charger output
Copyright © 2012–2014, Texas Instruments Incorporated 3
TSU8111
ZHCSAE4A –SEPTEMBER 2012–REVISED AUGUST 2014
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN MAX UNIT
V
BAT
–0.5 6
Supply voltage V
BUS
–0.5 28 V
V
DDIO
–0.5 4.6
V
BAT
+
V
DM_CON
, V
DP_CON
, V
ID_CON
, V
DP_HT
, V
DM_HT
–0.5
0.5
(2)
Input-output terminal voltage,
V
BAT
+ V
V
IO
V
RxD
, V
TxD
–0.5
0.5
(2)
V
SDA
–0.5 4.6
V
LDO
–0.5 6
V
BAT
+
Output voltage V
JIG
–0.5 V
0.5
(2)
V
INTB
, V
BOOT
–0.5 4.6
I
BAT
1
A
I
BUS
1
Input current I
K
Analog port diode current –50 50
I
IK
Digital logic input clamp current –50 mA
I
SCL
–50 50
I
SDA
–50 50
Input-output terminal current,
I
IO(on)
On-state continuous switch current –60 60 mA
I
IO
I
IO(peak)
On-state peak switch current –150 150
I
LDO
100
Output current I
GND
mA
I
INTB
, I
BOOT
–50 50
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If V
BUS
is present without V
BAT
, then the absolute maximum voltage is V
BUS
+ 0.5 V, and shall not exceed 6 V in total.
6.2 Handling Ratings
MIN MAX UNIT
T
stg
Storage temperature range –65 150 °C
VBUS, DP_CON,
Human body model (HBM), stress voltage
(1)
–12 12
DM_CON, ID_CON
kV
Electrostatic
V
(ESD)
discharge Charged device model (CDM), stress voltage
(2)
All other pins –2 2
IEC-61000-4-2 contact discharge –4 4 kV
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
4 Copyright © 2012–2014, Texas Instruments Incorporated
TSU8111
www.ti.com.cn
ZHCSAE4A –SEPTEMBER 2012–REVISED AUGUST 2014
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
BAT
3 4.4
Supply voltage V
BUS
4 6.5 V
V
DDIO
1.65 3.6
Input-output terminal voltage, V
IO
V
DM_CON
, V
DP_CON
, V
ID_CON
, V
DP_HT
, V
DM_HT
, V
RxD
, V
TxD
0 3.6 V
ID pin capacitance C
ID
1
nF
LDO output capacitance C
LDO
1
Operating free-air temperature T
A
–40 85 °C
6.4 Thermal Information
TSU8111
THERMAL METRIC
(1)
YFP UNIT
20 PINS
R
θJA
Junction-to-ambient thermal resistance 70.3
R
θJC(top)
Junction-to-case (top) thermal resistance 0.4
R
θJB
Junction-to-board thermal resistance 10.4 °C/W
ψ
JT
Junction-to-top characterization parameter 1.8
ψ
JB
Junction-to-board characterization parameter 10.4
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics
V
BAT
= 3 V to 4.4 V, V
DDIO
= 2.8 V, T
A
= –40°C to 85° C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
USB and UART PATHS
(1)
R
ON
On-state resistance V
I
= 0 V to 3.6 V, I
O
= –2 mA, V
BAT
= 3.6 V 8 Ω
On-state resistance match
ΔR
ON
V
I
= 0.4 V, I
O
= –2 mA, V
BAT
= 3.6 V 0.5 Ω
between channels
R
ON(flat)
On-state resistance flatness V
I
= 0 V to 3.6 V, I
O
= –2 mA, V
BAT
= 3.6 V 0.7 Ω
V
I
= 0.3 V, V
O
= 2.7 V or V
I
= 2.7 V, V
O
= 0.3
I
IO(OFF)
Off-state leakage current 45 nA
V, V
BAT
= 4.4 V, Switch off
V
I
= OPEN, V
O
= 0.3 V or 2.7 V, V
BA
T = 4.4 V,
I
IO(ON)
On-state leakage current 50 nA
Switch on
C
I(OFF)
Off-state capacitance at input DC bias = 0 V or 3.6 V, f = 10 MHz, Switch off 4 pF
C
O(OFF)
Off-state capacitance at output DC bias = 0 V or 3.6 V, f = 10 MHz, Switch off 7.5 pF
C
I(ON)
On-state capacitance at input DC bias = 0 V or 3.6 V, f = 10 MHz, Switch off 8.6 pF
C
O(ON)
On-state capacitance at output DC bias = 0 V or 3.6 V, f = 10 MHz, Switch off 8.6 pF
BW Bandwidth R
L
= 50 Ω, Switch on 820 MHz
O
ISO
Off isolation f = 240 MHz, R
L
= 50 Ω, Switch off -36 dB
X
TALK
Crosstalk f = 240 MHZ, R
L
= 50 Ω -35 dB
LINEAR CHARGER
(2)
Rising 250
Charger input voltage OK
V
CHG(OK)
V
BUS
– V
BAT
mV
threshold
Falling 45
I
2
C register 22h [7:6] = 00 6
I
2
C register 22h [7:6] = 01 6.5
VBUS over-voltage protection
V
BUS(OVP)
V
(default 7.5 V)
I
2
C register 22h [7:6] = 10 7
I
2
C register 22h [7:6] = 11 7.5
(1) V
O
is equal to the asserted voltage on DP_CON and DM_CON. V
I
is equal to the asserted voltage on DP_HT and DM_HT pins. I
O
is
equal to the current out of the DP_CON and DM_CON pins. I
I
is equal to the current into the DP_HT and DM_HT pins.
(2) Fast charging current will fall below listed values when junction temperature rises above 85°C due to thermal regulation circuitry.
Copyright © 2012–2014, Texas Instruments Incorporated 5
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