JESD84-B51.pdf

所需积分/C币:49 2019-07-19 11:53:31 4.96MB PDF
收藏 收藏
举报

JESD84-B51 emmc spec5.1 英文原版
PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. For information contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA22201-2107 orrefertowww.jedec.orgunderStandards-documents/copyrightInformation JEDEC Standard No, 84-B51 EMBEDDED MULTI-MEDIA CARD(eMMC)5.1 DEVICE Contents Foreword Introduction XX Normative reference.mmmmmmmmmmmommnmommmmmmom1 Terms and definitions ..mmmmm.... System Features 5 e MMC Device and System 鲁鲁鲁鲁鲁DD鲁看鲁鲁 e MMC System Overview 4666 5.2 Memory addressing e→ MMC Device 5.3.1 Bus Protocol 5.3.2 Bus Speed Modes 中·········*· 15 5.3.3 HS200 Bus Spccd modc ∴15 5.3.4 HS200 System Block Diagram 中中*····· 16 5.3. 5 HS200 Adjustable Sampling Host 16 5.3.6 HS400 Bus Speed Mode 16 5.3.7 HS400 System Block Diagram..... 17 6 eeMMC functional description n18 6.1 IMC OV .18 6.2 Partition Management 19 6.2 General 19 6.2.2 Command restrictions 6.2.3 Extended Partitions attribu 21 6.2.4 Configure partitions 625 Access partitions… 25 6.3 Boot operation mode 6.3.1 Device reset to pre-idle state .25 63.2 Boot partition…………… ··· ··· 27 6.3.3 Boot operation……… 28 6.3. 4 Alternative boot operation ∴29 6.3. 5 Access to boot partition 6.3.6 Boot bus width and data access configuration 33 6.3.7 Boot Partition Write Protection 34 6.4 Device identification mode 36 JEDEC Standard No. 84-B51 6.4.1 Device reset 中·····*· 6.4.2 Access mode validation(higher than 2GB of densities 37 6.4.3 From busy to ready ···· ∴37 6.4.4 Device identification process .38 6.5 Interrupt mode 38 6.6 Data transfer mode 6.6.1 Command sets and extended settings 42 6.6.2 High-speed modes selection 6.6.3" High-speed" mode selection ∴43 66.4“HS200” timing mode selection 6.6.5 "HS400"timing mode selection 46 6.6.6 Power class selection 6.6.7 Bus testing pi rocedure ....... 6. 6.8 Bus Sampling Tuning Concept 51 6.69 Bus width selection 6.6.10 Data read 54 6.6.11 Data write 6.6.12 Erase59 6.6.13TRIM6 6.6. 14 Sanitize 6.6.15 Discard 62 6.6.16 Secure erase.… 66.17 Secure trim...................... 65 6.6. 18 Write protect management 6. 6.19 Extended Security Protocols Pass Through Commands 68 6.6.20 Production State awareness 6.6.21 Field Firmware Update 6.6.22 Device lock/unlock operation 73 6.6.23 Application-specific commands 76 6. 6.24 Sleep(CMD5)...... 77 6.6.25 Replay protected Memory block 78 6.6.26 Dual Data Rate mode selection 6.6.27 Dual Data Rate mode operation 6.6.28 Background Operations 93 6.6.29 High priority Interrupt(hPl 94 6.6.30 Context Management 95 6.6. 31 Data Tag mechanism 99 JEDEC Standard No, 84-B51 6.6.32 Packed Commands 6. 6.33 Exception Events 102 66.34 Cache103 6. 6.35 Features cross matrix 105 6.6.36 Dynamic Capacity management 106 6.6.37 Large sector size…… 107 6.638 Real Time Clock Information 111 6.6.39 Power off notification 112 6.6.40 Cache enhancement barrier 113 6.6. 41 Cache Flushing policy...... 14 6642 Command queuing…… 115 6.6. 43 Secure Write protect mode 120 6.7 Clock contro 121 6.8 Error conditions……………… 121 6. 8.1 CRC and illegal command 12 6.8.2 Time-out conditions 12 6.8.3 Read ahead in multiple block read operation ∴123 6.9 Minimum performance 123 69.1 peed class definition 123 6.9.2 Measurement of the performance ………124 6.10 Commands 124 6.10.1 Command types…… 124 6.10.2 Command format 124 6.10.3 Command classes 125 6. 10. 4 Detailed command description.. 126 6.11 Device state transition table 134 6.12 Responses… …136 6.13 Device status 138 6.14 Memory array partitioning 142 6. 15 Timings..... 144 6. 15.1 Command and response 144 6. 15.2 Data read 146 6.153 Data write 147 6. 15.4 Bus test procedure timing 151 6. 15. 5 Boot operation 152 6. 15.6 Alternative boot operation .153 6. 15.7 Timing Values. 154 JEDEC Standard No. 84-B51 6.15.8 Timing changes in HS200&HS400mode…… 155 6.15.9 Enhanced Strobe in HS400 Mode 158 6. 15.10 H/W Reset Operation. ···· 6. 15.11 Noise filtering timing for H/W Reset 6. 15. 12 Additional Timing changes in HS400 mode Device Registers............. 161 7.1 OCR register 161 7.2 CID register. 162 7.2 MID[127:120]……… …162 7.2.2CBX[113:112] 162 7.2.3OID[11:04 162 7.24PNM[03:56] 162 7.2.5PRV[55:48]..… 162 7.2.6PSN[47:16 ∴162 7.2.7MDI[15:8] 163 7.2.8CRC[7:1]… 163 7 CSD register… 7.3.1 CSD STRUCTURE [127: 126] 165 73.2 SPEC VERS[125:122] 165 7.3.3TAAC[19112]… 165 7.34NSAC[l11:104]…… 165 7.3.5 TRAN SPEED [103: 96] 166 7.3.6CCC[95:84]… 166 7.3.7 READ BL LEN [83: 80] 166 7.3.8 READ BL PARTIAL[79 .167 7.3.9 WRITE BLK MISALIGN [78] 167 7.3. 10 READ BLK MISALIGN [77].... …167 7.3.11 DSR IMP [76] 167 7.3.12 C SIZE[73:62] 168 7. 3. 13 VDDR CURR MIN [61: 59]and VDD W CURR MIN [55:531 168 7.3. 14 VDD R CURR MAX [58: 56] and VDD W CURR MAX [52: 50 168 7.3.15 C SIZE MULT [49: 47 169 7.3. 16 ERASE GRP SIZE [46: 42] 169 7.3. 17 ERASE GRP MULT [41: 37 7.3.18WP( RP SIZE[36:32]……… 1069 7.3. 19 WP GRP ENABLE 311 7.3.20 DEFAULT ECC [30: 29 169 JEDEC Standard No, 84-B51 7.3.21R2 W FACTOR[28:26]..... 170 7.3.22 WRITE BL LEN [25: 22] 170 7.3.23 WRITE BL PARTIAL[21..... ···· ∴170 7.3. 24 CONTENT PROT APP [16] 170 7.3.25 FILE FORMAT GRP [15] 170 7.3.26COPY[14]… 170 7.3.27 PERM WRITE PROTECT [131 171 7.3.28 TMP WRITE PROTECT [12] 171 7.3.29 FILE FORMAT[II: 10 ∴171 7.3.30ECC[9:8]…… 7.3.31CRC[7:1] 7.4 Extended CSD register 173 7.4.1 EXT SECURITY ERR [5051 178 7.4.2 S CMD SET [504................................................... 178 7.4.3 HPI FEATURES [503 178 7.4.4 BKOPS SUPPORT...... 17 7.4.5 MAX PACKED READS [501]......... ∴179 7.4.6 MAX PACKED WRITES [500 179 7.4.7 DATA TAG SUPPORT [4991 179 7.4.8 TAG UNIT SIZE [498.. 7.4.9 TAG RES SIZE [497 179 7. 4.10 CONTEXT CAPABILITIES 496 180 7.4.1 L LARGE UNIT SIZE M1[495]……… 180 74.12 EXT SUPPORT[494]…… 180 7.4.13 SUPPORTED MODES[493]…… .180 7.4.14 FFU FEATURES [492 180 7.4. 15 OPERATION CODES TIMEOUT [491 181 7.4.16 FFU ARG[490-487]… l81 7.4.17 BARRIER SUPPORT[486 181 7.4. 18 CMDQ SUPPORT [308 18 74.19 CMDQ DEPTH 307 182 7.4.20 NUMBER OF FW SECTORS CORRECTLY PROGRAMMED [305-302] 182 7.4.21 VENDOR PROPRIETARY IIEALTII REPORT 301-270 182 7.4.22 DEVICE LIFE TIME EST TYP B [269] 182 7.4.23 DEVICE LIFE TIME_ EST TYP A[268]………… 183 7.4.24 PRE EOL INFO 2671 183 7.4.25 OPTIMAL READ SIZE [266] 184 JEDEC Standard No. 84-B51 7.4.26 OPTIMAL WRITE SIZE [265 7.4.27 OPTIMAL TRIM UNIT SIZE 264] 184 7.4.28 DEVICE VERSION [263-2621 …184 7.4.29 FIRMWARE VERSION 261-2541 185 74.30 CACHE S7F[252:249 185 7.4.31 GENERIC CMD6 TIME [248 185 7.4.32 POWER OFF LONG TIME [2477 185 7.4.33 BKOPS STATUS [2461 18 7.4.34 CORRECTLY PRG SECTORS NUM 1245: 242 ∴186 7.4.35 INI TIMEOUT AP [241 186 7.4.36 CACHE FLUSH POLICY [240] 187 7. 4.37 TRIM MULT [232 187 7.4.38 SEC FEATURE SUPPORT [2311 188 7.4.39 SEC ERASE MULT [230 …189 7.4.40 SEC TRIM MULT [229] 7.4.41 BOOT INFO [228 190 7.4.42 BOOT SIZE MULT [226] 7.443 ACC SIZ7[225] 191 7.4.44 HC ERASE GRP SIZE [224] 191 7. 4.45 ERASE TIMEOUT MULT [223 192 7.4.46 REL WR SEC C[222] 192 7. 4.47 HC WP GRP SIZE [221 192 7.4.48 SC VCC[220] and SC vccQ[219]... 193 7.4.49 PRODUCTION STATE AWARENESS TIMEOUT [218 193 74.50 S A TIMEOUT[217]…… 194 7.4.51 SLEEP NOTIFICATION TIME [216] 194 7452SEC_ COUNT[215:212] …194 7.4.53 SECURE WP INFO211] 195 7.4.54 MIN PERF a b ff [210/: 205]and MIN PERF DDR a b ff [235: 234] 196 7.4.55 PWR CL ff vvv [203: 200], PWR CL ff vvv[237: 236], PWR CL DDR ff vvv [239: 238] and PWR CL DDR ff vvv[253 196 7.4.56 PARTITION SWITCH TIME [1991 198 74.57 OUT OF INTERRUPT TIME[198]……… 198 7.4.58 DRIVER STRENGTH [1971 199 7,4.59 DEVICE_TYPE[196]……………… .200 7.4.60 CSD STRUCTURE [194 200 4.61 EXT CSD REⅤ[192] 201

...展开详情
试读 127P JESD84-B51.pdf
立即下载 低至0.43元/次 身份认证VIP会员低至7折
    抢沙发
    一个资源只可评论一次,评论内容不能少于5个字
    关注 私信 TA的资源
    上传资源赚积分,得勋章
    最新推荐
    JESD84-B51.pdf 49积分/C币 立即下载
    1/127
    JESD84-B51.pdf第1页
    JESD84-B51.pdf第2页
    JESD84-B51.pdf第3页
    JESD84-B51.pdf第4页
    JESD84-B51.pdf第5页
    JESD84-B51.pdf第6页
    JESD84-B51.pdf第7页
    JESD84-B51.pdf第8页
    JESD84-B51.pdf第9页
    JESD84-B51.pdf第10页
    JESD84-B51.pdf第11页
    JESD84-B51.pdf第12页
    JESD84-B51.pdf第13页
    JESD84-B51.pdf第14页
    JESD84-B51.pdf第15页
    JESD84-B51.pdf第16页
    JESD84-B51.pdf第17页
    JESD84-B51.pdf第18页
    JESD84-B51.pdf第19页
    JESD84-B51.pdf第20页

    试读已结束,剩余107页未读...

    49积分/C币 立即下载 >