Opencores.org project - DMA AHB - 32 bit build
This core is based on the Provartec PR201 IP - 'Generic High performance dual-core AHB DMA'
Build with the following parameters:
- Single channel
- Single interrupt bit
- One dual AHB port (simultaneous read and write)
- AHB data 32 bits
- data FIFO 32 bytes
- AHB address bits 32
- Block support - no
- Scheduler - no
- Priority modes - no
- Joint mode - yes
- Independent mode - yes
- Outstanding mode - no
- Tokens - yes
- AHB timeout - yes
- Watchdog timer - yes
- Peripheral control - yes
- Command lists - yes
- Endianess support - yes
To view the complete IP - http://www.provartec.com/ipproducts/57
For any questions / remarks / suggestions / bugs please contact info@provartec.com.
AHB总线下DMA硬件设计
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2019-04-29
21:50:40
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dma_ahb32.rar （50个子文件） 
dma_ahb32 
dma_ahb32_core0_ctrl.v 8KB prgen_joint_stall.v 5KB dma_ahb32_core0_top.v 8KB
README.txt 744B dma_ahb32_core0_ch_reg.v 34KB dma_ahb32_core0_ch_calc_joint.v 8KB filelist.txt 1KB dma_ahb32.v 10KB dma_ahb32_core0_ch_calc_addr.v 3KB prgen_swap_32.v 3KB prgen_delay.v 3KB dma_ahb32_core0_ch.v 28KB prgen_min3.v 3KB dma_ahb32_dual_core.v 11KB dma_ahb32_core0_ch_wr_slicer.v 8KB prgen_stall.v 3KB prgen_mux8.v 3KB prgen_rawstat.v 3KB dma_ahb32_core0_ch_fifo.v 3KB dma_ahb32_core0_ch_fifo_ctrl.v 7KB prgen_or8.v 3KB dma_ahb32_core0_ch_periph_mux.v 3KB dma_ahb32_apb_mux.v 4KB dma_ahb32_core0_ch_empty.v 8KB dma_ahb32_core0_ch_fifo_ptr.v 6KB dma_ahb32_core0_ch_rd_slicer.v 6KB dma_ahb32_reg.v 12KB dma_ahb32_core0_channels.v 53KB dma_ahb32_core0_ch_remain.v 5KB dma_ahb32_core0_channels_mux.v 14KB dma_ahb32_defines.v 3KB dma_ahb32_core0_ahbm_rd.v 16KB dma_ahb32_core0_ch_outs.v 3KB dma_ahb32_reg_params.v 3KB dma_ahb32_core0_channels_apb_mux.v 3KB dma_ahb32_core0_ch_reg_size.v 4KB dma_ahb32_core0_ch_offsets.v 4KB dma_ahb32_core0.v 26KB prgen_fifo.v 6KB dma_ahb32_core0_ahbm_wr.v 18KB prgen_min2.v 2KB prgen_scatter8_1.v 3KB dma_ahb32_core0_ch_calc_size.v 10KB prgen_demux8.v 3KB dma_ahb32_core0_ahbm_timeout.v 3KB dma_ahb32_core0_wdt.v 4KB dma_ahb32_core0_ch_calc.v 7KB dma_ahb32_core0_arbiter.v 4KB dma_ahb32_reg_core0.v 8KB dma_ahb32_ch_reg_params.v 3KB资源评论
蟹蛛2023-07-27文件中的图表设计精巧，能够清晰地展示DMA硬件设计的各个环节，给读者提供了很好的参考。
马虫医生2023-07-27作者在文件中提出了一些值得思考的问题，激发了读者的学习兴趣和思考能力。
今年也要加油呀2023-07-27这个文件对于初学者来说非常友好，适合用作学习和参考资料。
空城大大叔2023-07-27AHB总线下DMA硬件设计的文件很详细地介绍了DMA硬件设计的基本原理和实现方法，让人受益匪浅。
销号le2023-07-27文档中的实例和案例非常实用，能够帮助读者理解DMA硬件设计的具体应用场景。
