#include "altera_avalon_pio_regs.h"
#include "alt_types.h"
#include "altera_avalon_timer_regs.h"
#include "system.h"
#include "sys/alt_irq.h"
#include "priv/alt_busy_sleep.h"
#include "altera_avalon_uart_regs.h"
#include "altera_avalon_uart.h"
#include "Sci.h"
//#include "Sci232.h"
#include "93c46.h"
#include "PLL.h"
#include "timer.h"
#include "ledsound.h"
#include "fifo_right.h"
#define ID_OK 0
alt_u8 v1,v2,v3,v4;
#define D_CS_pin(v1) IOWR_ALTERA_AVALON_PIO_DATA(D_CS_BASE, v1)
#define D_DAT_pin(v2) IOWR_ALTERA_AVALON_PIO_DATA(D_SDA_BASE,v2)
#define D_SCL_pin(v3) IOWR_ALTERA_AVALON_PIO_DATA(D_SCL_BASE,v3)
#define D_FS_pin(v4) IOWR_ALTERA_AVALON_PIO_DATA(D_FS_BASE, v4)
unsigned char system_find_mode= 0;//找卡模式
unsigned char system_freq_mode= 0;//调频模式
unsigned char system_uhf_mode =0; //协议模式
unsigned char system_b_Sx=0; //设置通道
unsigned char system_isTrigle=0; //读找卡方式
unsigned char system_b_isQ =0; //读找Q及方式
unsigned char system_b_userQ=0; //读找Q及方式
unsigned char system_output_FREQ_bak;//设置输出频率W
unsigned char system_output_DA_bak=0;//设置输出功率W
extern alt_u16 needcl,needcl232;
extern alt_u8 counti;
volatile int edge_capture;
alt_u16 countflag=0;
alt_u16 uart0_fifo_flag=0;
alt_u16 changedata[5];
unsigned char t1,t2,t3,t4;
void Delay0(unsigned int data)
{
unsigned int i;
for (i=0;i<data;i++) { ; }
}
void init_DA(void)
{
D_CS_pin(1);
D_DAT_pin(1);
D_SCL_pin(1);
D_FS_pin(1);
}
void output_DA(unsigned int data)
{
unsigned int i,Temp;
data<<=4;
data|=1<<14;
data&=~(1<<13);
D_CS_pin(0);
Delay0(500);
D_FS_pin(0);
Delay0(500);
Temp = 0x8000;
for (i=0;i<16;i++)
{
if ((data & Temp)==0)
D_DAT_pin(0);
else
D_DAT_pin(1);
Temp >>= 1;
Delay0(100);
D_SCL_pin(0);
Delay0(100);
D_SCL_pin(1);
}
Delay0(100);
D_FS_pin(1);
Delay0(100);
D_CS_pin(1);
D_DAT_pin(1);
}
void uart0_data_change(alt_u32 ch_data)
{
alt_u32 mm;
mm=ch_data;
countflag=countflag+1;
if((countflag>=1)&&(countflag<=2))
uart0_fifo_flag=0;
else
{
changedata[0]=ch_data&0xff;
changedata[1]=(ch_data&0xff00)>>8;
changedata[2]=(ch_data&0xff0000)>>16;
changedata[3]=(ch_data&0xff000000)>>24;
uart0_send_response(ID_OK,4,changedata);
}
}
alt_u32 fifo_read(void)
{
alt_u32 fifo;
IOWR_ALTERA_AVALON_PIO_DATA(READEN_BASE,0x1);
IOWR_ALTERA_AVALON_PIO_DATA(READCLK_BASE,0x1);
IOWR_ALTERA_AVALON_PIO_DATA(READCLK_BASE,0x0);
IOWR_ALTERA_AVALON_PIO_DATA(READEN_BASE,0x0);
fifo=IORD_ALTERA_AVALON_PIO_DATA(DATAINTERRUPUT_BASE);
printf("%x\n",fifo);
uart0_data_change(fifo);
return (fifo);
}
void pio_interrupts(void* context, alt_u32 id)
{
alt_u32 fifout=0;
volatile int* edge_capture_ptr = (volatile int*) context;
*edge_capture_ptr = IORD_ALTERA_AVALON_PIO_EDGE_CAP(HALF_REFORM_BASE);
IOWR_ALTERA_AVALON_PIO_EDGE_CAP(HALF_REFORM_BASE, 0x0);
IOWR_ALTERA_AVALON_PIO_DATA(READEN_BASE,1);
fifout=fifo_read();
}
void init_pio_fifo(void)
{
void* edge_capture_ptr = (void*) &edge_capture;
IOWR_ALTERA_AVALON_PIO_IRQ_MASK(HALF_REFORM_BASE, 0x1);
IOWR_ALTERA_AVALON_PIO_EDGE_CAP(HALF_REFORM_BASE, 0x0);
alt_irq_register( HALF_REFORM_IRQ, edge_capture_ptr, pio_interrupts );
}
int main()
{
alt_u16 iCmd=0;
alt_u16 iDataLen;
alt_u16 uart_copy_ram[30];
InitSci();
init_DA();
init_pll();
init_pa();
timer_0_init();
timer_1_init();
//eeprom_init();
init_pio_fifo();
IOWR_ALTERA_AVALON_PIO_DATA(PIO_BASE,0);
alt_busy_sleep(100);
IOWR_ALTERA_AVALON_PIO_DATA(PIO_BASE,1);
beep();
// fifo_write(0x1287);
// fifo_write(0x7417);
// fifo_write(0x785274);
// fifo_write(0x139202);
// fifo_read_allone(counti);
while(1)
{
if (needcl!=0)
{
needcl=0;
copy_uart(&iCmd,&iDataLen,uart_copy_ram); // 命令转换
switch(iCmd) // 命令解释
{
case CMD_SYSTEM_INIT:
uart0_send_response(ID_OK,0,uart_copy_ram);
break;
case CMD_SYSTEM_OPEN_PA:
open_pa();
uart0_send_response(ID_OK,0,uart_copy_ram);
break;
case CMD_SYSTEM_CLOSE_PA:
close_pa();
uart0_send_response(ID_OK,0,uart_copy_ram);
break;
case CMD_SET_OUTPUT_POWER:
system_output_DA_bak=uart_copy_ram[5];
output_DA(system_output_DA_bak);
uart0_send_response(ID_OK,0,uart_copy_ram);
eeprom_write(10, system_output_DA_bak);
break;
case CMD_SET_OUTPUT_FREQ:
if (uart_copy_ram[5] < 132 )
{
system_output_FREQ_bak=uart_copy_ram[5];
set_pll(system_output_FREQ_bak);
uart0_send_response(ID_OK,0,uart_copy_ram);
eeprom_write(9, system_output_FREQ_bak);
}
break;
case CMD_WORK_START_FIND: //..............0X06//
uart0_send_response(ID_OK,0,uart_copy_ram);
open_pa();
break;
case CMD_WORK_STOP_FIND: //..............0X07//
uart0_send_response(ID_OK,0,uart_copy_ram);
close_pa();
break;
case CMD_SET_WORK_ANT: //..............0X08//
break;
case CMD_SET_FINDCRD_MODE: //..............0X09//
system_find_mode=uart_copy_ram[5];
uart0_send_response(ID_OK,0,uart_copy_ram);
eeprom_write(2, system_find_mode);
break;
case CMD_GET_OUTPUT_POWER: //..............0X0A//
uart_copy_ram[0]=system_output_DA_bak;
uart0_send_response(ID_OK,1,uart_copy_ram);
break;
case CMD_GET_OUTPUT_FREQ: //..............0X0B//
uart_copy_ram[0]=system_output_FREQ_bak;
uart0_send_response(ID_OK,1,uart_copy_ram);
break;
case CMD_GET_WORK_ANT: //..............0X0C//
break;
case CMD_GET_FINDCRD_MODE: //..............0X0D//
uart_copy_ram[0]=system_find_mode;
uart0_send_response(ID_OK,1,uart_copy_ram);
break;
case CMD_GET_ANTONLINE_STATE: //..............0X0E//
break;
