Release 14.7 - par P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Wed Oct 18 23:34:26 2017
INFO: The IO information is provided in three file formats as part of the Place and Route (PAR) process. These formats are:
1. The <design name>_pad.txt file (this file) designed to provide information on IO usage in a human readable ASCII text format viewable through common text editors.
2. The <design namd>_pad.csv file for use with spreadsheet programs such as MS Excel. This file can also be read by PACE to communicate post PAR IO information.
3. The <design name>.pad file designed for parsing by customers. It uses the "|" as a data field separator.
INPUT FILE: ring_oscillator_map.ncd
OUTPUT FILE: ring_oscillator_pad.txt
PART TYPE: xc3s500e
SPEED GRADE: -4
PACKAGE: fg320
Pinout by Pin Number:
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|Pin Number|Signal Name|Pin Usage|Pin Name |Direction|IO Standard|IO Bank Number|Drive (mA)|Slew Rate|Termination|IOB Delay|Voltage |Constraint|IO Register|Signal Integrity|
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
|A1 | | |GND | | | | | | | | | | | |
|A2 | | |TDI | | | | | | | | | | | |
|A3 | |IBUF |IP |UNUSED | |0 | | | | | | | | |
|A4 | |DIFFM |IO_L24P_0 |UNUSED | |0 | | | | | | | | |
|A5 | |DIFFMI |IP_L22P_0 |UNUSED | |0 | | | | | | | | |
|A6 | |DIFFS |IO_L20N_0 |UNUSED | |0 | | | | | | | | |
|A7 | |IBUF |IP |UNUSED | |0 | | | | | | | | |
|A8 | |IOB |IO |UNUSED | |0 | | | | | | | | |
|A9 | | |VCCO_0 | | |0 | | | | |2.50 | | | |
|A10 | |DIFFS |IO_L12N_0/GCLK7 |UNUSED | |0 | | | | | | | | |
|A11 | |IOB |IO |UNUSED | |0 | | | | | | | | |
|A12 | | |NC | | | | | | | | | | | |
|A13 | |DIFFM |IO_L05P_0 |UNUSED | |0 | | | | | | | | |
|A14 | |DIFFS |IO_L04N_0 |UNUSED | |0 | | | | | | | | |
|A15 | |DIFFSI |IP_L02N_0 |UNUSED | |0 | | | | | | | | |
|A16 |A |IBUF |IO_L01N_0 |INPUT |LVCMOS25* |0 | | | |NONE | |UNLOCATED |NO |NONE |
|A17 | | |TCK | | | | | | | | | | | |
|A18 | | |GND | | | | | | | | | | | |
|B1 | | |PROG_B | | | | | | | | | | | |
|B2 | | |GND | | | | | | | | | | | |
|B3 | |DIFFS |IO_L25N_0/HSWAP |UNUSED | |0 | | | | | | | | |
|B4 | |DIFFS |IO_L24N_0 |UNUSED | |0 | | | | | | | | |
|B5 | |DIFFSI |IP_L22N_0 |UNUSED | |0 | | | | | | | | |
|B6 | |DIFFM |IO_L20P_0 |UNUSED | |0 | | | | | | | | |
|B7 | | |VCCAUX | | | | | | | |2.5 | | | |
|B8 | |DIFFMI |IP_L13P_0/GCLK8 |UNUSED | |0 | | | | | | | | |
|B9 | |DIFFSI |IP_L13N_0/GCLK9 |UNUSED | |0 | | | | | | | | |
|B10 | |DIFFM |IO_L12P_0/GCLK6 |UNUSED | |0 | | | | | | | | |
|B11 | |IOB |IO/VREF_0 |UNUSED | |0 | | | | | | | | |
|B12 | | |VCCAUX | | | | | | | |2.5 | | | |
|B13 | |DIFFS |IO_L05N_0/VREF_0 |UNUSED | |0 | | | | | | | | |
|B14 | |DIFFM |IO_L04P_0 |UNUSED | |0 | | | | | | | | |
|B15 | |DIFFMI |IP_L02P_0 |UNUSED | |0 | | | | | | | | |
|B16 | |DIFFM |IO_L01P_0 |UNUSED | |0 | | | | | | | | |
|B17 | | |GND |
没有合适的资源?快使用搜索试试~ 我知道了~
SSI_Library.rar_SSI_SSI Verilog_logic_ssi verilog_verilog ssi
共164个文件
bin:10个
v:10个
ncd:9个
1.该资源内容由用户上传,如若侵权请联系客服进行举报
2.虚拟产品一经售出概不退款(资源遇到问题,请及时私信上传者)
2.虚拟产品一经售出概不退款(资源遇到问题,请及时私信上传者)
版权申诉
5星 · 超过95%的资源 1 下载量 88 浏览量
2022-07-14
18:07:17
上传
评论
收藏 251KB RAR 举报
温馨提示
SSI library, Logic gates verilog codes
资源推荐
资源详情
资源评论
收起资源包目录
SSI_Library.rar_SSI_SSI Verilog_logic_ssi verilog_verilog ssi (164个子文件)
ring_oscillator.bgn 5KB
top_module.bgn 5KB
and.bgn 5KB
ring__oscillator.bin 2KB
_e_x_n_o_r.bin 1KB
_e_x_o_r.bin 1KB
_t_r_i.bin 1KB
_top___module.bin 1KB
_n_a_n_d.bin 1KB
_n_o_r.bin 1KB
_a_n_d.bin 1KB
_o_r.bin 1KB
_n_o_t.bin 778B
ring_oscillator.bit 277KB
top_module.bit 277KB
and.bit 277KB
ring_oscillator.bld 1KB
Top_Module.bld 1KB
AND.bld 968B
Top_Module.cmd_log 11KB
ring_oscillator.cmd_log 4KB
AND.cmd_log 2KB
Top_Module_pad.csv 13KB
AND_pad.csv 13KB
ring_oscillator_pad.csv 12KB
ring_oscillator.drc 208B
top_module.drc 198B
and.drc 184B
SSI_Library.gise 21KB
usage_statistics_webtalk.html 29KB
AND_envsettings.html 15KB
Top_Module_envsettings.html 15KB
AND_summary.html 10KB
ring_oscillator_envsettings.html 9KB
Top_Module_summary.html 8KB
ring_oscillator_summary.html 7KB
AND_fpga_editor.log 3KB
ring_oscillator_map_fpga_editor.log 2KB
Top_Module_fpga_editor.log 2KB
webtalk.log 780B
planAhead_run.log 0B
planAhead_run.log 0B
planAhead_run.log 0B
planAhead_run.log 0B
planAhead_run.log 0B
ring_oscillator.lso 6B
Top_Module.lso 6B
.lso 6B
AND.lso 6B
netlist.lst 97B
ring_oscillator_map.map 2KB
AND_map.map 2KB
Top_Module_map.map 2KB
AND_map.mrp 5KB
Top_Module_map.mrp 5KB
ring_oscillator_map.mrp 5KB
ring_oscillator.ncd 20KB
ring_oscillator_guide.ncd 20KB
ring_oscillator_map.ncd 11KB
AND_guide.ncd 2KB
AND.ncd 2KB
Top_Module.ncd 2KB
Top_Module_guide.ncd 2KB
AND_map.ncd 2KB
Top_Module_map.ncd 2KB
ring_oscillator.ngc 22KB
Top_Module.ngc 944B
AND.ngc 932B
ring_oscillator.ngd 37KB
Top_Module.ngd 2KB
AND.ngd 2KB
ring_oscillator_map.ngm 73KB
Top_Module_map.ngm 3KB
AND_map.ngm 3KB
ring_oscillator.ngr 42KB
Top_Module.ngr 984B
AND.ngr 717B
AND_timesim.nlf 2KB
AND_map.nlf 2KB
AND_translate.nlf 795B
AND_synthesis.nlf 733B
AND.pad 12KB
ring_oscillator.par 5KB
AND.par 5KB
Top_Module.par 5KB
Top_Module.pcf 374B
ring_oscillator.pcf 221B
AND.pcf 221B
ring_oscillator.prj 64B
Top_Module.prj 59B
OR.prj 30B
AND.prj 30B
SSI_Library.projectmgr 10KB
AND.ptwx 16KB
hdllib.ref 598B
and_timesim.sdf 2KB
and_map.sdf 1KB
OR.stx 1KB
AND.stx 0B
Top_Module.stx 0B
共 164 条
- 1
- 2
资源评论
- zuosiqiqi12023-11-02简直是宝藏资源,实用价值很高,支持!
alvarocfc
- 粉丝: 103
- 资源: 1万+
下载权益
C知道特权
VIP文章
课程特权
开通VIP
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功