File Contents
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This zip file contains the following folders:
hdl_source -- Source VHDL files:
med.vhd - top level file
me.vhd - encoder portion
md.vhd - decoder portion
hdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they
do not instantiate the DUT. This can easily be done in a top-level VHDL
file or a schematic. This folder contains the following files:
md_tf.vhd -- Test fixture for md.vhd.
me_tf.vhd -- Test fixture for me.vhd.
This design is targeted to the XCR3064XL-7VQ100C CoolRunner CPLD. This is a 3V, 64 macrocell device in a 100 VQFP
package. The fitter was allowed to pick the pin-out for the device.
Please also note that this design has been verified through simulations, but not on actual hardware.
