ADV7619配置文件

;;Reset = True;; ;;ReadInterface = True;; ---------------------------------------------------------- Revision History ---------------------------------------------------------- ; Version 1.0c ; Initial ; ; --------------------------------------------------------------------- ; Version 1.1c ; 2x1080p60 renamed to 1080p60 PixRep (297MHz) ; Added 4k2k scripts ; Dropped 68 BA B2 write from all scripts ; Added 422 scripts ; ; --------------------------------------------------------------------- ; Version 1.2c ; 98 0C 40 changed to 98 0C 42 ; 98 BF 01 removed from modes 1080p60 PixRep (297MHz) and 1080p60 PixRep=2Interleaved mode, upper part of bus ; ; --------------------------------------------------------------------- ; Version 1.3c ; 50 xx xx Writes removed (FPGA) ; 44 6C 00 Added as per RSD ; 68 C0 03 Added as per RSD ; 68 03 98 Added as per RSD ; 68 10 A5 Added as per RSD ; 68 45 04 Added as per RSD ; 68 97 C0 Added as per RSD ; 68 3D 10 Added as per RSD ; 68 4E 7E changed to 68 4E FE ; 68 4F 42 changed to 68 4F 42 ; 68 50 00 Added as per RSD ; ; --------------------------------------------------------------------- ; Version 1.4c ; 68 93 03 Added as per RSD ; 68 5A 80 Added as per RSD ; ; --------------------------------------------------------------------- ; Version 1.5c ; Added following writes: ; 68 85 11 ; Added as per RSD for 27MHz modes ; 68 6F 08 ; Added as per RSD for all frequencies ; 68 1B 00 ; Added as per RSD for all 297MHz modes ; 68 1B 08 ; Added as per RSD for less than 297MHz modes ; 68 9C 80 ; ADI Required Write ; 68 9C C0 ; ADI Required Write ; 68 9C 00 ; ADI Required Write ; ; --------------------------------------------------------------------- ; Version 1.6c ; Removed 68 3D 10 from the 4K2K scripts for optimal J-TOL performance ; ; --------------------------------------------------------------------- ; Version 1.7c ; Scripts numbered ; Replaced "ADI Recommended Write", "ADI reccommended writes", "ADI recommended setting" or "ADI Recommended Sequence" comments with "ADI Required Write" ; ; Script 01-01: Removed Encoder reset write (56 17 02 ; Encoder reset) ; ; Renamed ":PortA 480i,576i,240p,288p,480p,576p,Any CSpaceIn 24bit RGB from ADV761x thru HDMI Out 24bit RGB FS VIC,1,3,6,14,17,18,21,29,30:" ; as ":02-01 480i,576i,480p,576p In - 24-bit RGB 444 Out:" ; Renamed ":PortA,480i,576i,240p,288p,480p,576p Any CSpaceIn 24bit YCrCb422 from ADV761X thru HDMI Out 24bit YCrCb422 FS VIC,1,3,6,14,17,18,21,29,30:" ; as ":02-02 480i,576i,480p,576p In - 24-bit YCbCr 422 Out:" ; Renamed ":PortA,480i,576i,240p,288p,480p,576p Any CSpaceIn 36bit RGB from ADV761X thru HDMI Out 36bit RGB FS VIC,1,3,6,14,17,18,21,29,30:" ; as ":02-03 480i,576i,480p,576p In - 36-bit RGB 444 Out:" ; Renamed ":PortA 480i,576i,240p,288p,480p,576p,Any CSpaceIn,24bit YCrCb444 from ADV761X thru HDMI Out 24bit YCbCr FS VIC,1,3,6,14,17,18,21,29,30:" ; as ":02-04 480i,576i,480p,576p In - 24-bit YCbCr 444 Out:" ; Renamed ":PortA 480i,576i,240p,288p,480p,576p,Any CSpaceIn,36bit YCrCb444 from ADV761X thru HDMI Out 36bit YCbCr FS VIC,1,3,6,14,17,18,21,29,30:" ; as ":02-05 480i,576i,480p,576p In - 36-bit YCbCr 444 Out:" ; ; Renamed ":PortA 720p,1080i,Any CSPace In,24bit RGB from ADV761X thru HDMI Out 24bit RGB FS VIC,4,5,19,20:" ; as ":02-06 720p,1080i,1080p In - 24-bit RGB 444 Out:" ; Renamed ":PortA,720p,1080i,1080p Any CSpaceIn In 24bit YCrCb422 from ADV761X thru HDMI Out 24bit YCrCb422 FS VIC,4,5,19,20:" ; as ":02-07 720p,1080i,1080p In - 24-bit YCbCr 422 Out:" ; Renamed ":PortA,720p,1080i,1080p Any CSpaceIn 36bit RGB from ADV761X thru HDMI Out 36bit RGB FS VIC,4,5,19,20:" ; as ":02-08 720p,1080i,1080p In - 36-bit RGB 444 Out:" ; Renamed ":PortA 720p,1080i,Any CSPace In,24bit YCrCb444 from ADV761X thru HDMI Out 24bit YCbCr FS VIC,4,5,19,20:" ; as ":02-09 720p,1080i,1080p In - 24-bit YCbCr 444 Out:" ; Renamed ":PortA 720p,1080i,Any CSPace In,36bit YCrCb444 from ADV761X thru HDMI Out 36bit YCbCr FS VIC,4,5,19,20:" ; as ":02-10 720p,1080i,1080p In - 36-bit YCbCr 444 Out:" ; ; "02 HDMI In ADV7619 - HDMI Out ADV7511" Section: Fixed inconsistencies in ADV7511 settings across all scripts ; ; Removed 1080p PixRep (297MHz) scripts ; ; Renamed "4kx2k out through DAC" section as "03 4kK2K Input Resolution" ; Renamed ":4kx2k 444 lower part of bus:" script as ":03-01 4K2K RGB 444 In - 2x24-bit RGB 444 Out:" ; Removed ":4kx2k 444 upper part of bus:" script ; Added ":03-02 4K2K YCbCr 422 In - 2x24-bit YCbCr 422 Out:" script ; Added ":03-03 4K2K YCbCr 444 In - 2x24-bit YCbCr 444 Out:" script ; ; --------------------------------------------------------------------- ; Version 1.8c ; Clarified modes as being for Input Pixel Frequency of <= 170MHz and of > 170MHz ; For modes > 170MHz, added write 98 00 19 ; Set VID_STD ; For modes > 170MHz, added write 98 01 05 ; Prim_Mode =101b HDMI-Comp ; For modes > 170MHz, added write 98 DD 00 ; Default value ; For modes > 170MHz, added write 98 E7 04 ; ADI Required Write ; ; --------------------------------------------------------------------- ; Version 1.9c ; Added write to DPLL map for modes > 170MHz ; For modes > 170MHz, added write 4C DB 80 ; ADI Required Write ; ; --------------------------------------------------------------------- ##Script Details## :Version 1.8c 23/09/15 ADLK: End ##01 Reset script## :01-01 Reset Script: 98 FF 80 ; I2C reset End ##02 HDMI Input to ADV7619, Input Pixel Frequency <= 170MHz ## :02-01 480i,576i,480p,576p In - 24-bit RGB 444 Out: 98 FF 80 ; I2C reset 98 F4 80 ; CEC 98 F5 7C ; INFOFRAME 98 F8 4C ; DPLL 98 F9 64 ; KSV 98 FA 6C ; EDID 98 FB 68 ; HDMI 98 FD 44 ; CP 68 C0 03 ; ADI Required Write 98 01 06 ; Prim_Mode =110b HDMI-GR 98 02 F7 ; Auto CSC, RGB out, Set op_656 bit 98 03 40 ; 24 bit SDR 444 Mode 0 98 05 28 ; AV Codes Off 98 06 A0 ; No inversion on VS,HS pins 98 0C 42 ; Power up part 98 15 80 ; Disable Tristate of Pins 98 19 83 ; LLC DLL phase 98 33 40 ; LLC DLL MUX enable 44 BA 01 ; Set HDMI FreeRun 44 6C 00 ; Required ADI write 64 40 81 ; Disable HDCP 1.1 features 4C B5 01 ; Setting MCLK to 256Fs 68 C0 03 ; ADI Required write 68 00 08 ; Set HDMI Input Port A (BG_MEAS_PORT_SEL = 001b) 68 02 03 ; ALL BG Ports enabled 68 03 98 ; ADI Required Write 68 10 A5 ; ADI Required Write 68 1B 08 ; ADI Required Write 68 45 04 ; ADI Required Write 68 97 C0 ; ADI Required Write 68 3D 10 ; ADI Required Write 68 3E 69 ; ADI Required Write 68 3F 46 ; ADI Required Write 68 4E FE ; ADI Required Write 68 4F 08 ; ADI Required Write 68 50 00 ; ADI Required Write 68 57 A3 ; ADI Required Write 68 58 07 ; ADI Required Write 68 6F 08 ; ADI Required Write 68 83 FC ; Enable clock terminators for port A & B 68 84 03 ; ADI Required Write 68 85 11 ; ADI Required Write 68 86 9B ; ADI Required Write 68 89 03 ; ADI Required Write 68 9B 03 ; ADI Required Write 68 93 03 ; ADI Required Write 68 5A 80 ; ADI Required Write 68 9C 80 ; ADI Required Write 68 9C C0 ; ADI Required Write 68 9C 00 ; ADI Required Write 72 01 00 ; Set N Value(6144) 72 02 18 ; Set N Value(6144) 72 03 00 ; Set N Value(6144) 72 15 00 ; Input 444 (RGB or YCrCb) with Separate Syncs, 44.1kHz fs 72 16 61 ; YCrCb 444 72 18 46 ; CSC disabled 72 3B 80 ; PR Auto Mode 72 40 80 ; General Control Packet Enable 72 41 10 ; Power Down control 72 48 08 ; Data right justified 72 49 A8 ; Set Dither_mode - 12-to-10 bit 72 4C 04 ; 8 bit Output 72 55 00 ; Set RGB 444 in AVinfo Frame 72 56 08 ; Set active format Aspect 72 96 20 ; HPD Interrupt clear 72 98 03 ; ADI Required Write 72 99 02 ; ADI Required Write 72 9C 30 ; PLL Filter R1 Value 72 9D 61 ; Set clock divide 72 A2 A4 ; ADI Required Write 72 A3 A4 ; ADI Required Write 72 AF 16 ; Set HDMI Mode 72 BA 60 ; No clock delay 72 DE 9C ; ADI Required Write 72 E4 60 ; VCO Swing Reference Volt