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近期学习了 PCIe 均衡相关东西,查阅了不计其数的文档。得闲,整理一下,供个人随时查阅,亦供他人参考。PCIe 均衡系列文章分为 3 篇: 1. PCIe 均衡技术介绍(概要),简单介绍均衡的概念、信号补偿技术及均衡系数协商的过程,初步了解 PCIe 均衡可阅读此篇。 2. PCIe 均衡技术介绍(电气物理篇),从电气物理层面介绍均衡器相关技术细节及均衡参数测量评估方法,想要深究 PCIe 均衡底层原理可阅读此篇。 3. PCIe 均衡技术介绍(逻辑物理篇),从逻辑物理层面介绍均衡系数协商的过程及均衡相关的各项协议标准,想要深入学习 PCIe 均衡系数协商过程可参考此篇。 本文已包含 PCIe 2.5 GT/s、5 GT/s、16 GT/s、32 GT/s 相关均衡介绍,尚未整理 64 GT/s 相关均衡的介绍,也未整理接收端压力眼图测试部分。整理者技术水平及在本文上的精力投入有限,本文可想而知存在诸多纰漏,望读者朋友们看到后能够指出,感谢!
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PCIe 均衡介绍
PCIe Equalization Introduction
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目录
0. 引言 ................................................................................................................................................. 1
1. PCIe 均衡技术介绍(概要) ....................................................................................................... 2
1.1 信号均衡概念及意义 ............................................................................................................. 2
1.2 信号补偿技术 ......................................................................................................................... 2
1.3 均衡系数协商 ......................................................................................................................... 3
1.3.1 Phase 0 ........................................................................................................................ 3
1.3.2 Phase 1 ........................................................................................................................ 3
1.3.3 Phase 2 ........................................................................................................................ 3
1.3.4 Phase 3 ........................................................................................................................ 4
2. PCIe 均衡技术介绍(电气物理篇) ........................................................................................... 5
2.1 发送端均衡 ............................................................................................................................. 5
2.1.1 预加重 .......................................................................................................................... 5
2.1.2 去加重 .......................................................................................................................... 5
2.1.2.1 去加重的优点 ................................................................................................... 5
2.1.2.2 去加重规则 ....................................................................................................... 6
2.1.3 三抽头 FIR 滤波器(均衡器) ................................................................................ 7
2.1.3.1 三抽头 FIR 结构 ............................................................................................. 7
2.1.3.2 四种电平,De-emphasis, Pre-shoot 及 Boost .................................. 8
2.1.3.3 FIR 系数 ............................................................................................................ 9
2.1.3.3.1 FIR 系数约束 ........................................................................................ 9
2.1.3.3.2 FIR 系数 Preset ................................................................................. 10
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2.1.3.3.3 FIR 系数范围、Tolerance 及三角矩阵 .......................................... 12
2.2 接收端均衡 ........................................................................................................................... 13
2.2.1 CTLE ............................................................................................................................ 13
2.2.2 DFE ............................................................................................................................. 14
2.3 不同速率均衡方案选择 ....................................................................................................... 15
2.3.1 速率 2.5 GT/s 均衡................................................................................................. 15
2.3.2 速率 5 GT/s 均衡 .................................................................................................... 16
2.3.3 速率 8 GT/s、16 GT/s、32 GT/s 均衡 ............................................................... 17
2.4 均衡参数测量及评估 ........................................................................................................... 17
2.4.1 速率 2.5 及 5 GT/s Tx EQ 参数测量................................................................... 18
2.4.1.1 EQ 电压测量 .................................................................................................. 18
2.4.1.2 V
TX-DIFF-PP
测量 ................................................................................................ 18
2.4.2 速率 8 GT/s, 16 GT/s 及 32 GT/s Tx EQ 参数测量 ......................................... 18
2.4.2.1 Vb 测量 .......................................................................................................... 18
2.4.2.2 Va、Vc 测量 ................................................................................................... 19
2.4.2.3 V
TX-DIFF-PP
测量 ................................................................................................ 20
3. PCIe 均衡技术介绍(逻辑物理篇) ......................................................................................... 22
3.1 PCIe 均衡机制 ...................................................................................................................... 22
3.1.1 两种均衡机制 ............................................................................................................ 22
3.1.1.1 自动均衡机制 ................................................................................................. 22
3.1.1.1.1 自动均衡中的 DLLP Blocking ........................................................ 22
3.1.1.2 软件均衡机制 ................................................................................................. 23
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3.1.2 均衡加速与关闭 ........................................................................................................ 25
3.1.2.1 Equalization bypass to highest rate ....................................................... 25
3.1.2.2 No equalization needed ............................................................................ 26
3.1.3 均衡结果判别及措施 ................................................................................................ 27
3.1.3.1 均衡成功的标志 ............................................................................................. 27
3.1.3.2 重新均衡机制 ................................................................................................. 28
3.1.3.2.1 何时重新 EQ ? ................................................................................ 28
3.1.3.2.1.1 均衡失败 .................................................................................. 28
3.1.3.2.1.2 均衡设置问题 .......................................................................... 29
3.1.3.2.1.3 改变链路宽度 .......................................................................... 29
3.1.3.2.2 重新 EQ 过程 .................................................................................... 29
3.1.3.2.2.1 DSP 请求重新 EQ .................................................................. 30
3.1.3.2.2.2 USP 请求重新 EQ .................................................................. 30
3.1.3.2.2.3 Quiesce Guarantee 机制 ..................................................... 30
3.1.3.2.2.4 Perform Equalization 与 Link Equalization Request 有
何区别? ....................................................................................................... 31
3.1.4 不同情况下的 EQ 需求 ........................................................................................... 31
3.1.4.1 切速中的 EQ ................................................................................................. 31
3.1.4.1.1 2.5 GT/s -> 8 GT/s 或 5 GT/s -> 8 GT/s .................................... 31
3.1.4.1.2 8 GT/s -> 16 GT/s 或 16 GT/s -> 32 GT/s ................................ 32
3.1.4.1.3 2.5 GT/s -> 32 GT/s 或 5 GT/s -> 32 GT/s ............................... 33
3.1.4.1.4 相同速率跳转的 EQ .......................................................................... 34
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3.1.4.2 Crosslink 中的 EQ ....................................................................................... 34
3.1.4.3 Loopback 或 Compliance 中的 EQ ....................................................... 34
3.2 PCIe 均衡系数协商 .............................................................................................................. 34
3.2.1 DSP ............................................................................................................................. 35
3.2.1.1 Phase 1 ........................................................................................................... 37
3.2.1.2 Phase 2 ........................................................................................................... 39
3.2.1.3 Phase 3 ........................................................................................................... 40
3.2.2 USP ............................................................................................................................. 42
3.2.2.1 Phase 0 ........................................................................................................... 43
3.2.2.2 Phase 1 ........................................................................................................... 44
3.2.2.3 Phase 2 ........................................................................................................... 45
3.2.2.4 Phase 3 ........................................................................................................... 47
3.2.3 Preset 及 Coefficient 响应 ................................................................................... 49
3.2.4 start_equalization_w_preset ................................................................................ 49
3.3 EQ 举例 ................................................................................................................................. 50
3.3.1 速率 8 GT/s Equalization Flow ........................................................................... 50
3.3.2 速率 16 GT/s Equalization Flow ......................................................................... 52
3.3.3 Equalization Bypass Flow ..................................................................................... 53
参考 ....................................................................................................................................................... 55
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