安森美半导体ESD保护器件NUP2202W1-D 数据手册.pdf

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安森美半导体ESD保护器件NUP2202W1-D 数据手册pdf,安森美半导体ESD保护器件NUP2202W1-D 数据手册
NUP2202W1 EC61000-4-2Spec lEC61000-4-2 Waveform Test First peak Voltage Current Current at Current at Level (kv) 30ns(A)60ns(4) 90% 2 7.5 4 15 8 4 l@30n 3 6 225 2 8 30 16 8 I 60 ns 10% tp=0.7 ns to 1 ns Figure 3. IEC61000-4-2 Spec ESD Gun TVS Oscilloscope 日已日日○ 509 Cable 50g O吕O ○○ Figure 4. Diagram of ESD Test Setup The following is taken from Application Note systems such as cell phones or laptop computers it is not AND8308/D-Interpretation of Datasheet Parameters clearly defined in the spec how to specify a clamping voltage for esd devices at the device level ON Semiconductor has developed a way ESD Voltage Clamping to examine the entire voltage waveform across the esd For sensitive circuit elements it is important to limit the protection diode over the time domain of an ESd pulse in the voltage that an IC will be exposed to during an ESD event form of an oscilloscope screenshot which can be found on to as low a voltage as possible. The eSd clamping voltage the datasheets for all esd protection diodes. For more is the voltage drop across the est protection diode during information on how on Semiconductor creates these an esd event per the Iec61000-4-2 waveform Since the screenshots and how to interpret them please refer to IEC61000-4-2 was written as a pass/fail spec for larger AND8307/D 100F PEAK VALUE IRSM @8 us 90 80 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE TH 570 PEAK CURRENT DECAY=8 us ↓ HALF VALUE IpsM/2@z0is 50 n Y40 n"30 10 0 t, TIME (us) Figure 5. 8 X 20 us Pulse Waveform http:/onsemi.com NUP2202W1 TYPICAL PERFORMANCE CURVES (J=25 C unless otherwise noted) 100 90 570 00∝uoaxu 50 40 10 25 75100125150175200 TA, AMBIENT TEMPERATURE(C) Figure 6. Pulse Derating Curve 5.0 4 4 505 16 山 之3 14 3.0 yO-Ground 12 2. 10 2. 1. es z集2 1. 505050 4 0. 2 0 4 20 VBR, REVERSE VOLTAGE (V PEAK PULSE CURRENT (A) Figure 7. Junction Capacitance vs Reverse voltage Fiqure 8 clamping voltage vs Peak Pulse current 8 x 20 us Waveform) http:/onsemi.com NUP2202W1 APPLICATIONS INFORMATION The NUP2202W1 is a low capacitance Tvs diode array option 2 designed to protect sensitive electronics such as Protection of two data lines with bias and power supply communications systems, computers, and computer isolation resistor peripherals against damage due to esd events or transient overvoltage conditions. Because of its low capacitance, it /O1 can be used on high speed lo data lines. The integrated 02 design of the NUP2202W1 offers surge rated, low capacitance steering diodes and a tvs diode integrated in 6 a single package(SC-88). If a transient condition occurs, the 10k steering diodes will drive the transient to the positive rail of the power supply or to ground. The tvs device protects the power line against overvoltage conditions to avoid damage to the power supply and any downstream components NUP2202W1 Device Configuration Options The NUP2202Wi can be isolated from the power supply The NUP2202W1 is able to protect two data lines against by connecting a series resistor between pin 5 and Vcc. A transient overvoltage conditions by driving them to a fixed 10 ks resistor is recommended for this application. This reference point for clamping purposes. The steering diodes will maintain bias on the internal TVS and steering diodo will be forward biased whenever the voltage on the reducing their capacitance protected line exceeds the reference vollage(For Vcc+ Vf. The diodes will force the transient current to bypass the Option 3 sensitive circuit Protection of two data lines using the internal Tvs diode Data lines are connected at pins 1 and 6. The negative as reference reference is connected at pin 2. This pin must be connected directly to ground by using a ground plane to minimize the PCBs ground inductance. It is very important to reduce the /o 2 PCB trace lengths as much as possible lo minimize parasitic inductance 1 6 Option 1 NC Protection of two data lines and the power supply usin Vcc as reference /O1 )2 In applications lacking a positive supply reference or those cases in which a fully isolated power supply is required, the internal TVs can be used as the reference. For these applications, pin 5 is not connected. In this configuration, the steering diodes will conduct whenever the voltage on the protected line exceeds the working voltage of the Tvs plus one diode drop(vc=vf VTvs ESD Protection of Power Supply Lines For this configuration, connect pin 5 directly to the When using diodes for data line protection, referencing to positive supply rail(Vcc), the data lines are referenced to a supply rail provides advantages. Biasing the diodes the supply voltage. The internal tvs diode prevents reduces their capacitance and minimizes signal distortion overvoltage on the supply rail. Biasing of the steering diodes Implementing this topology with discrete devices does have reduces their capacitance disadvantages. This configuration is shown below: http:/onsemi.com NUP2202W1 Powe inductance will provide significant benefits in transient Supply ImmunIty Vcc Even with good board layout, some disadvantages are still present when discrete diodes are used to suppress esd events across datalines and the supply rail. Discrete diodes Protected Data Line with good transient power capability will have larger die and Device therefore higher capacitance. This capacitance becomes D2 problematic as transmission frequencies increase. Reducing ESDneg VF +Vcc capacitance generally requires reducing die size. These small die will have higher forward voltage characteristics at typical ESd transient current levels. This voltage combined Looking at the figure above, it can be seen that when a with the smaller die can result in device failure positive esd condition occurs, diode di will be forward The on semiconductor nuP2202W1 was developed to biased while diode d2 will be forward biased when a overcome the disadvantages encountered when using negative ESD condition occurs. For slower transient discrete diodes for ESd protection. This device integrates a conditions, this system may be approximated as follows: TVS diode within a network of steering diodes For positive pulse conditions Vc=VCC+ViDi D3 For negative pulse conditions VfD? ESD events can have rise times on the order of some number of nanoseconds Under these conditions the effect D2 of parasitic inductance must be considered. A pictorial representation of this is shown below Power Supply ESDpos Figure 9. NUP2202W1 Equivalent Circuit D1ESDpos During an ESd condition, the esd current will be driven Protected ESDneg Device to ground through the tvs diode as shown below. Data line D2, Vc=VcC+Vf+(L diESD/dt) Power SOng Supply Vc=-Vf-(L dIESD/ D1 ESDpos d Protected An approximation of the clamping voltage for these fast Device Data line transients would be D2 For positive pulse conditions Vc=V CC+ Vf +(l diesd/dt) For negative pulse conditions: Vc=-Vf-(L diESD/dt) As shown in the formulas, the clamping voltage(Vc)not The resulting clamping voltage on the protected IC will only depends on the Vf of the steering diodes but also on the L diEsD/dt factor. a relatively small trace inductance can Vc=VE+ Tvs result in hundreds of volts appearing on the supply rail. This The clamping voltage of the Tvs diode is provided in endangers both the power supply and anything attached to Figure 8 and depends on the magnitude of the est current that rail. This highlights the importance of good board The steering diodes are fast switching devices with unique layout. Taking care to minimize the effects of parasiti forward voltage and low capacitance characteristics http:/onsemi.com NUP2202W1 TYPICAL APPLICATIONS UPSTREAM USB PORT BUS D+ D R DOWNSTREAM USB PORT BUS BUS GND Controller C ~P4吗1GND BUS D+ dOWNSTREAM R USB PORT TTC GND Figure 10. ESD Protection for USB Port http:/onsemi.com NUP2202W1 PACKAGE DIMENSIONS SC-88/Sc70-6/SOT363 CASE 419B-02 ISSUE W NOTES ENSIONING AND TOLERANCING PER ANSI D 2. CONTROLLING DIMENSION: INCH 3. 4196-01 OBSOLETE NEW STANDARD 419B-02 MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A08o095「11o003100370043 A1_0o00.050.10o。000.0020.004 4 0.100.210.300.0040.0080.012 E Lc0.100,14_0250040050010 1151:251.350.0450.0490053 0. 65 BSC 0.026BsC 0.100.200.300.0040.0080.012 k bsPL 2002.10 .20|0.0780.0820.086 中020090E SOLDERING FOOTPRINT 3 0.50 0.0197 Al 0.65 0.025 0.025 0.0157 9 0.0748 SCALE 20: 1 Sc-88/SC70-6/s0T-363 For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D ON Semiconductor and (N are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability rising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitaticn special, consequential or incidental damages Typica " parameters which may be provided in scilla data sheets anc/cr specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals"must be validated for each customer application by customer's technical experts. SCILLC doas not convey any license under its patent ights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scilla product could create a situation where personal injury or death may cccur Shculd Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ScillA was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity /Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT N.AmericanteChnicalSupport:800-282-9855TollFreeonSemiconductorWebsitewww.onsemi.com Literature Distribution Center for oN Semiconductor USA/Canada P.O. Box Denver Colorado 80217 USA Europe, Middle East and Africa Technical Suppor OrderLiterature:http://www.onsemi.com/orderlit Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Phone: 421 33790 2910 Fax: 303-675-2176 or 800-344-3867 Tcll Free USA/Canada Japan Customer Focus Center For additional information, please contact your local Emailcrderlit@onsemi.com Phone:81-3-5773-3850 Salcs Ropresortativo NUP2202W1/D

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