安森美半导体ESD保护器件CM2006-D 数据手册.pdf

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安森美半导体ESD保护器件CM2006-D 数据手册pdf,安森美半导体ESD保护器件CM2006-D 数据手册
CM2006 PIN DESCRIPTIONS LEAD(s) NAME DESCRIPTION This is a supply input for the sync 1 and SYnc 2 level shifters, video protection and the DDC circuits 2 ENABLE Active high enable Disables the Sync buffer outputs when low VIDEo_1 Video signal ESD protection channel. This pin is typically tied one of the video lines between the controller device and the video connector 4 VIDEO_2 Video signal ESD protection channel. This pin is typically tied one of the video lines between the controller device and the video connector VIDEO_3 Video signal ESD protection channel. This pin is typically tied one of the video lines between the controller device and the video connector 56789 GND Ground reference supply pin CC DDC This is an isolated supply input for the DDC_1 and DDC_2 level-shifting N-FET gates BYP An external 0. 22uF bypass capacitor is required on this pin DDC IN1 DDC signal input. Connects to the video connector side of one of the DDC lines. signal output 10 DDC OUT1 DDC signal output. Connects to the monitor DDC logic 11 DDC_OUT DDC signal output Connects to the monitor DDC logic 12 DDC_IN2 DDC signal input. Connects to the video connector side of one of the DDC lines 13 SYNC_IN1 Sync signal buffer input. Connects to the video connector side of one of the sync lines 14 SYNC__OUT1 Sync signal buffer output Connects to the monitor SYNC logic 15 SYNC_IN2 Sync signal buffer input. Connects to the video connector side of one of the sync lines 16 SYNC_OUT2 Sync signal buffer output Connects to the monitor SYNC logic Ordering Information PART NUMBERING INFORMATION Pins Package Ordering Part Number Part Marking 16 QSOP CM2006-02QR CM2006-02QR Note 1: Parts are shipped in Tape and Reel form unless otherwise specified Rev.2Page3of9Iwww.onsemi.com cM2006 Specifications ABSOLUTE MAXIMUM RATINGS PARAMETER RATING UNITS V CC DDC and v Supply Voltage Inputs GND-0.5]to+6.0 DC Voltage at Inputs video 1. VIdEo 2 Video 3 GND-0.5]to|a+0.5 DDC IN1 DDC IN2 [GND-0.5]to60 DDC OUT1. DDC OUT2 [GND-05]to6.0 SYNC IN1 SYNC IN2. ENABLE GND-0.5]to[+0.5 Operating temperature range -40to+85 Storage Temperature Range 40to+150 ℃ Package Power Rating (T=25C) 500 W STANDARD OPERATING CONDITIONS PARAMETER RATING UNITS Operating Temperature Range 40to+85 ℃ CC 5 Rev.2Page4of9iwww.onsemi.com CM2006 ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE I SYMBOLPARAMETER CONDITIONS MIN TYP MAX UNITS Vcc opc Supply Current 50V Vor Supply Current Vcc=5v: SYNC inputs at GND or Vco MA SYnC outputs unloaded Vcc= 5V, SYNC inputs at 3.0V 2.0mA SYNC outputs unloaded V,ESD Diode Forward Voltage =10mA 1.0 Logic High Input Voltage 5.0V: Note 2 2.0 Logic Low Input voltage V-50V: note 2 05 Hysteresis Voltage Vcc=5.0V; Note 2 400 mV V Logic High Output Voltage ou =OmA, Vo= 5.0V: Note 2 4.0 Logic Low Output Voltage OmAV=5.0V: Note 2 015V SYNC Driver Output Resistance Vc=5.0V, SYNc Inputs at GNd or 3.0V 7 15 24 Input Current VIDEO Inputs V=5.0V:V,=V or gnd 10 A SYNC_IN1, SYNC_IN2 Inputs V=5.0V;V=V or GND =10uA lbFF Level Shifting N-MOSFET"OFF"State (Vo Dpc -VoDc n0.4V; Vopc Cut= v Leakage Current (Vec ppc -Vopc our)0. 4V: VODC IN= Vc Dpc 10 A 10 is powered down Voltage Drop Across Level-shifting 25V;V。=GND; 3mA CC DDc 018V N-MOSFET When"ON ViDEo Input capacitance V=5.0V; V=2.5V; f= 1MHZ 3 F V=2.5V;V=1.25V;f=1MHz 3.5 pF 12 ns SYNC Driver H=>L Propagation Delay C.-50pF; Vo=5.0V; Input t and t. 5r 12 SYNC Driver Output Rise Fall Times C=50pF; Vcc=5.0V; Input to and t: 5ns ESD Withstand Voltage, Sync_out pins only Vc=5V: Notes 3 and 4 +2 kV ESD Withstand Voltag V.=5V: Notes 3 and 5 ±8 k Note 1: All parameters specified over standard operating conditions unless otherwise noted Note 2: These parameters apply only to the SYNc drivers. Note that Rou =R,+reuFeer Note 3: Per the lEC-61000-4-2 International ESD Standard, Level 4 contact discharge method BYP and Vcc must be bypassed to GND via a low impedance ground plane with a 0. 22uF, low inductance, chip ceramic capacitor at each supply pin. ESD pulse is applied between the applicable pins and GND. ESD pulses can be positive or negative with respect to GND Applicable pins are: VIDEO_1, VIDEO_2, VIDEo_3, SYNC_N1, SYNC_IN2, DDC_N1 and DDC_IN2. All pins are ESD protected to the industry standard +2kV Human Body Model(MIL- STD-883, Method 3015 Note 4: This specification applies to the SYNC_OUT pins only Note 5: Applicable pins are: VIDEO_1, VIDEO_2, VIDEO_3, SYNC_IN1, SYNC_IN2, DDC_IN1 and DDC_IN2 Rev.2Page5of9Iwww.onsemi.com cM2006 Application Information CC 5y Epinal EM Filtera ■■■■ VSYNC 022UF VsYNC HSYRC ENABLE HSYNC vCC 5W STNC IN1 SYNC OUT1 DDCA CLK 了于 Tal Restora R2 I IS6a Nata 10. DDC IN1 DDC_UT1 DDC CLK DDCA DATA PDC N2 DDC OUT2 DsDA∏A CM2006 RED VIDEO wDE。1 BYP BRED GREEN VIDEO OSaIF VIDEO 色 GREEN BLUE VIDEO VDEO 3 O BLUE 4E=O FHer WcC DDC - CC GPE Video port Connector Figure 1. Typical Application Connection Diagram NOTES The CM2006 should be placed as close to the vGa or DVI-I connector as possible 2 The ESD protection channels VIDEO_, VIDEO_, video 3 may be used interchangeably between the R, G, B gnals 3 If differential video signal routing is used, the red, BLUe, and green signal lines should be terminated with external 37.5 ohm resistors 4"FAre external video filters for the rgb signals 5 Supply bypass capacitors C1 and C2 must be placed immediately adjacent to the corresponding Vcc pins. Connections to the Vcc pins and ground plane must be made with minimal length copper traces(preferably less than 5mm) for best ESD protection 6 The bypass capacitor for the BYP pin has been omitted in this diagram. This results in a reduction in the maximum ESD withstand voltage at the ddC_oUt pins from +8kV to +2kv. If 8kV ESD protection is required, a 0.22uF ceramic bypass capacitor should be connected between BYP and ground 7 The sync buffers may be used interchangeably between HSYNc and VSYNc 8 The EMi filters at the sYNc_OUT and DDC_oUT pins(C5 to C12, and Ferrite Beads FBl to FB4)are for reference only The component values and filter configuration may be changed to suit the application 9 The DDC level shifters DDC_IN, DDC_ OUT, may be used interchangeably between DDCA_ CLK and DDCA_ DATA 10 R1, R2 are optional. They may be used, if required, to pull the dDC_ clK and dDC_ datA lines to vcc_5v when no VGa card is connected to the vga monitor If used it should be noted that"back current"may flow between the ddc pins and vcc_ 5v via these resistors when Vcc_ 5v is powered down Rev.2Page6of9Iwww.onsemi.com CM2006 Mechanical details QsoP Mechanical Specifications CM2006 devices are packaged in 16-pin QSoP packages. Dimensions are presented below Mechanical Package Diagrams PACKAGE DIMENSIONS Package QSOP (JEDEC name is SSOP) 15141212109 Pins 16 目目目目日目日目 Millimeters Inches Dimensions H E Pini Marka Min Max Min Max 1.35 1.75 0.053 0.069 目目目目日目日日 1224567g A1 0.10 0.25 0.004 0.010 0.20 0.30 0.008 0.012 CIDE VIEN c 0.18 0.25 0.007 0.010 4.80 5.00 0.189 0.197 E 3.81 3.98 0.150 0.157 0.64 BSC 0.025BsC H 5.79 6.19 0.228 0.244 BD MIEL 0.40 1.27 0016 0.050 per tube 100 pcs per tape 2500 pcs and reel Controlling dimension inches Package Dimensions for QSoP-16 g This is an approximate number which may vary Rev.2Page7of9Iwww.onsemi.com cM2006 Tape and Reel Specifications PACKAGE SIZE POCKET SIZE (mm) TAPE WIDTH REEL QTY PER PART NUMBER (mm) B..XK W DIAMETER REEL P CM2006 490×389X1.55530×650X210 12mm 330mm(13") 2500 4mm 8mm 10 Pitche nes Cumulative P。> To erance on Ta Cover Tape ( For tape feeder reference Embossment Concentric around B A Center Lines of Cavity User Direction of Feed Rev.2Page8of9iwww.onsemi.com CM2006 producs- iconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals"must be validated for each customer application by customer's technical experts. SCI-LC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicaticns interdec to support or sustain life, or for any other application in which the failure of the Scilla product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly ar indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent ragarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 onSemiconductorwebsitewww.onsemi.com Literature Distribution center for on semiconductor Toll free USA/Canada P O. Box 5163. Denvcr, Colorado 80217 USA Europe, Middle East and Africa Techn ica orderliTeraturehttp://www.onsemi.com/orderlit le: 303-675-2175 or 800-344-3860 Toll Free USA/Canada 303-675-21 76 or 800-344-3867 Toll free usa/canada Phone:421337902910 For additional information, please contact you il: orderlit@onsemi com Japan customer Focus center Sales Representative Phone:8135773-3850 Rev.2Page9of9Iwww.onsemi.com

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