Essentials of Computer Architecture(2nd) 无水印pdf

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Taylor francis Taylor Francis Group http://taylorandfrancis.com ESSENTIALS OF COMPUTER ARCHITECTURE Second edition DOUGLAS COMER C CRC Press Group Boca Raton London New York CRC Press is an imprint of the Taylor Francis Group, an informa business a ChaPman hall book SPARC is a registered trademark of SPARC International, Inc in the United States and other countries ARM is a registered trademark of ARM Limited in the United States and other countries MIPS is a registered trademark of MIPS Technologies, Inc in the United States and other countries Itanium and Xeon are trademarks of, and Intel and Pentium are registered trademarks of Intel Corporation All other trademarks referred to herein are the property of their respective owners CRC Press Taylor Francis Group 6000 Broken Sound Parkway NW, Suite 300 Boca raton FL 33487-2742 o 2017 by Taylor Francis Group, LLC CRC Press is an imprint of Taylor Francis Group, an Informa busincss No claim to original U.S. Government works Printed on acid-free paper Version date 20161102 International Standard Book Number-13: 978-1-138-62659-1(Hardback, This book contains information obtained from authentic and highly regarded sources. Reasonable efforts have been made to publish reliable data and information, but the author and publisher cannot assume responsibility for the valid y of all materials or the consequences of their use. The authors and publishers have attempted to trace the copyright holders of all material reproduced in this publication and apologize to copyright holders if permission to publish in this form has not been obtained. If any copyright material has not been acknowledged please write and let us know so we may rectify in any future reprint Except as permitted under U.S. Copyright Law, no part of this book may be reprinted, reproduced, transmitted, or uti lized in any form by any electronic, mechanical, or other means, now known or hereafter invented, including photocopy- ing, microfilming, and recording, or in any information storage or retrieval system, without written permission from the publishers. Forpermissiontophotocopyorusematerialelectronicallyfromthisworkpleaseaccesswww.copyrightcom(http:/i www.copyright.com/)orcontacttheCopyrightcLearanceCenter,Inc.(ccc),222RosewoodDrive,Danvers,Ma01923 978-750-8400. CCC is a not-for-profit organization that provides licenses and registration for a variety of users. For organizations that have been granted a photocopy license by the CCC, a separate system of payment has been arranged Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for identification and explanation without intent to infringe Library of Congress Cataloging-in-Publication Data Names: Comer, Douglas, author Titlc: Essentials of computer architecture Douglas Comet. CRC title Description: Second edition. Boca Raton: Taylor Francis, a Crc title part of the Taylor& Francis imprint, a member of the Taylor francio Group, the academic division of T&F Informa, plc, [2017 Includes index Identifiers: LCCN 2016041657 ISBN 9781138626591(hardback: alk. paper Subjects: LCSH: Computer architecture. Classification: LCC QA769A73 C625 2017 DDC 004.2/2--dc23 Lcrecordavailableathttps://lccn.loc.gov/201604-1657 Visit the Taylor francis Web site at http://www.taylorandfrancis.com and the Crc Press Web site at http://www.crcpress.com To Chris, who makes all the bits of life meaningful Taylor francis Taylor Francis Group http://taylorandfrancis.com Contents Preface XXI Chapter 1 Introduction And Overview 1. The Importance Of Architecture 3 1.2 Learning The Essentials 3 Organization Of The Text 4 1. 4 What we will omit 4 1.5 Terminology: Architecture And Design 5 1.6 Summary 5 PART Basics 7 Chapter 2 Fundamentals of Digital Logic 2.1 Introduction 11 2. 2 Digital Computing Mechanisms 1 1 2.3 Electrical Terminology: Voltage And Current 12 2. 4 The transistor 13 2.5 Logic Gates 14 2.6 Implementation Of A Nand Logic Gate Using Transistors 16 2.7 Symbols Used For Logic Gates 17 2.8 Example Interconnection Of Gates 17 2.9 A Digital Circuit For Binary Addition 20 2.10 Multiple gates Per Integrated Circuit 22 2. The need for More Than Combinatorial circuits 22 2.2 Circuits That Maintain state 23 2.13 Propagation Delay 24 2.14 Using latches To Create a Memory 24 2.15 Flip-Flops And Transition Diagrams 25 2.16 Binary Counters 27 2. 17 Clocks And Sequences 28 2. 8 The Important Concept Of Feedback 31 2. 19 Starting A Sequence 32 Contents 2.20 Iteration In Software Vs Replication In Hardware 33 2.21 Gate And Chip Minimization 34 2.22 Using Spare Gates 34 2.23 Power Distribution And Heat Dissipation 35 2. 24 Timing And Clock Zones 35 2.25 Clockless logic 37 2.26 Circuit Size And Moore's law 38 2.27 Circuit Boards And Layers 39 2.28 Levels Of Abstraction 39 2.29 Summa Chapter 3 Data And Program Representation 45 3. Introdu 3.2 Digital Logic And The Importance Of Abstraction 45 3.3 Definitions Of Bit And Byte 46 3.4 Byte Size and possible val 3.5 Binary Weighted Positional representation 47 3.6 Bit 848 3.7 Hexadecimal Notation 49 3.8 Notation For Hexadecimal and Binary Constants 51 3.9 Character sets 51 3.10 Unicode 52 3. 1 Unsigned Integers, Overflow, And Underflow 53 3.12 Numbering Bits And Bytes 53 3.13 Signed Binary Integers 55 3. 14 An Example Of Two's Complement Numbers 56 3.15 Sign Extension 57 3.16 Floating point 58 3. 7 Range Of IEEE Floating Point values 59 3.18 Special Values 60 3.19 Binary Coded Decimal representation 61 3.20 Signed, Fractional, And Packed BCD Representations 62 3.21 Data Aggregates 62 3.22 Program Representation 63 3.23 Summary 63 PART Processors 65 Chapter 4 The variety Of Processors And Computational Engines 69 4. ntroduction 6 4.2 The Two Basic Architectural Approaches 60 4.3 The harvard And von Neumann Architectures 70 4.4 Defin OfA Pi 71 The range Of Pi 4.6 Hierarchical Structure And Computational Engines 73 4.7 Structure Of A Conventional Processor 74 4.8 Processor Categories And Roles 75 4.9 Processor Technologies 77 4.10 Stored Programs 77 4.1 The Fetch-Execute Cycle 78 4.12 Program Translation 79 4.13 Clock Rate And Instruction Rate 79 4.4 Control: Getting Started And Stopping 80 4.15 Starting The Fetch-Execute Cycle g1 4.16 Summary 82 Chapter 5 Processor Types And Instruction Sets 85 5. Introduction 85 5.2 Mathematical Power, Convenience, And Cost 85 5.3 Instruction set Architecture 86 5.4 Opcodes, Operands, And Results 87 5.5 Typical Instruction Format 87 5.6 Variable-Length Vs Fixed-Length Instructions 87 5.7 General-Purpose Registers 88 5.8 Floating Point Registers And Register Identification 89 5.9 Programming With registers 89 5.10 Register Banks 90 5.77 Complex And Reduced Instruction Sets 91 5.12 RISC Design And The Execution Pipeline 92 5.13 Pipelines And Instruction Stalls 93 5.14 Other Causes Of Pipeline stalls 95 5.15 Consequences For Programmers 95 5. 16 Programming, Stalls, And No-Op Instructions 96 5.17 Forwarding 97 5.18 Types Of Operations 97 5.19 Program Counter, Fetch-Execute, And Branching 98 5.20 Subroutine Culls, Arguments, And Register Windows 99

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