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loginid=Zhi.chen@tcl.com,time=2014-03-20 14:01:23,ip=222.66.88.205,doctitle=MT6595WG_Technical_Brief_v0 3.doc,company=JRDC-SH_WCX
MT6595
Octa-Core Smartphone
Application Processor
Technical Brief
Version: 0.3
Release date: 2013-12-31
© 2011 - 2014 MediaTek Inc.
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Specifications are subject to change without notice.
MEDIATEK CONFIDENTIAL
FOR Zhi.chen@ tcl.com USE ONLY
loginid=Zhi.chen@tcl.com,time=2014-03-20 14:01:23,ip=222.66.88.205,doctitle=MT6595WG_Technical_Brief_v0 3.doc,company=JRDC-SH_WCX
MT6595
Octa-Core Smartphone
Application Processor
Technical Brief
MediaTek Confidential
© 2013 - 2014 MediaTek Inc.
Page 2 of 73
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Document Revision History
Revision
Date
Author
Description
0.1
2013-10-24
Kelly Teng
0.2
2013-12-17
Kelly Teng
0.3
2013-12-31
Kelly Teng
MEDIATEK CONFIDENTIAL
FOR Zhi.chen@ tcl.com USE ONLY
loginid=Zhi.chen@tcl.com,time=2014-03-20 14:01:23,ip=222.66.88.205,doctitle=MT6595WG_Technical_Brief_v0 3.doc,company=JRDC-SH_WCX
MT6595
Octa-Core Smartphone
Application Processor
Technical Brief
MediaTek Confidential
© 2013 - 2014 MediaTek Inc.
Page 3 of 73
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
MEDIATEK CONFIDENTIAL
FOR Zhi.chen@ tcl.com USE ONLY
loginid=Zhi.chen@tcl.com,time=2014-03-20 14:01:23,ip=222.66.88.205,doctitle=MT6595WG_Technical_Brief_v0 3.doc,company=JRDC-SH_WCX
MT6595
Octa-Core Smartphone
Application Processor
Technical Brief
MediaTek Confidential
© 2013 - 2014 MediaTek Inc.
Page 4 of 73
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Table of Contents
Document Revision History .................................................................................................................. 2
Table of Contents ................................................................................................................................... 4
1 System Overview .......................................................................................................................... 7
1.1 Platform Features ................................................................................................................. 8
1.2 MODEM Features ................................................................................................................. 9
1.3 Multimedia Features ........................................................................................................... 11
1.4 General Descriptions .......................................................................................................... 13
2 Product Description ................................................................................................................... 15
2.1 Pin Description.................................................................................................................... 15
2.1.1 Ball Map View ..................................................................................................... 15
2.1.1 Pin Coordinate .................................................................................................... 16
2.1.2 Detailed Pin Description ..................................................................................... 26
2.2 Electrical Characteristic ...................................................................................................... 39
2.2.1 Absolute Maximum Ratings ............................................................................... 39
2.2.2 Recommended Operating Conditions ................................................................ 41
2.2.3 Storage Condition ............................................................................................... 43
2.2.4 AC Electrical Characteristics and Timing Diagram ............................................ 43
2.3 System Configuration ......................................................................................................... 47
2.3.1 Mode Selection ................................................................................................... 47
2.3.2 Constant Tied Pins ............................................................................................. 47
2.4 Power-on Sequence ........................................................................................................... 47
2.5 Analog Baseband ............................................................................................................... 48
2.5.1 Introduction ......................................................................................................... 48
2.5.2 Features ............................................................................................................. 49
2.5.3 Block Diagram .................................................................................................... 49
2.6 Package Information ........................................................................................................... 72
2.6.1 Package Outlines ............................................................................................... 72
2.6.2 Thermal Operating Specifications ...................................................................... 72
2.6.3 Lead-free Packaging .......................................................................................... 72
2.7 Ordering Information ........................................................................................................... 73
2.7.1 Top Marking Definition ....................................................................................... 73
List of Figures
Figure 1-1. Block diagram of MT6595 ................................................................................................... 14
Figure 2-1. Bottom ball map view of MT6595 ....................................................................................... 15
Figure 2-2. Top ball map view of MT6595 ............................................................................................. 16
Figure 2-3. Basic timing parameter for LPDDR3 commands ................................................................ 43
MEDIATEK CONFIDENTIAL
FOR Zhi.chen@ tcl.com USE ONLY
loginid=Zhi.chen@tcl.com,time=2014-03-20 14:01:23,ip=222.66.88.205,doctitle=MT6595WG_Technical_Brief_v0 3.doc,company=JRDC-SH_WCX
MT6595
Octa-Core Smartphone
Application Processor
Technical Brief
MediaTek Confidential
© 2013 - 2014 MediaTek Inc.
Page 5 of 73
This document contains information that is proprietary to MediaTek Inc.
Unauthorized reproduction or disclosure of this information in whole or in part is strictly prohibited.
Figure 2-4. Basic timing parameter for LPDDR3 write .......................................................................... 44
Figure 2-5. Basic LPDDR3 read timing parameter................................................................................ 44
Figure 2-6. Power on/off sequence with XTAL ...................................................................................... 48
Figure 2-7. Block diagram of LTE_BBRX-ADC ..................................................................................... 50
Figure 2-8: Block diagram of TD_BBRX-ADC ...................................................................................... 52
Figure 2-9. Block diagram of LTE_BBTX .............................................................................................. 53
Figure 2-10. Block diagram of TD_BBTX .............................................................................................. 55
Figure 2-11. Block diagram of ETDAC .................................................................................................. 56
Figure 2-12. Block diagram of APC-DAC .............................................................................................. 57
Figure 2-13. Block diagram of AUXADC ............................................................................................... 58
Figure 2-14. Block diagram of PLL ....................................................................................................... 62
Figure 2-15. Outlines and dimensions of WFPOP 14mm*14mm, 823-ball, 0.4mm pitch package ...... 72
Figure 2-16. Top mark of MT6595 ......................................................................................................... 73
List of Tables
Table 2-1. Bottom Pin coordinate .......................................................................................................... 16
Table 2-2. Top pin coordinate ................................................................................................................ 24
Table 2-3. Acronym for pin type ............................................................................................................ 26
Table 2-4. Detailed pin description ........................................................................................................ 26
Table 2-5. Absolute maximum ratings for power supply ....................................................................... 39
Table 2-6. Recommended operating conditions for power supply ........................................................ 41
Table 2-7. LPDDR3 AC timing parameter table of external memory interface...................................... 44
Table 2-8. Mode selection of chip ......................................................................................................... 47
Table 2-9. Constant tied pins of chip ..................................................................................................... 47
Table 2-10. Baseband downlink specifications ..................................................................................... 50
Table 2-11: Baseband downlink specifications ...................................................................................... 52
Table 2-12. LTE_BBTX specifications ................................................................................................... 53
Table 2-13. TD_BBTX specifications..................................................................................................... 55
Table 2-14. ETDAC specifications ........................................................................................................ 56
Table 2-15. APC-DAC specifications ..................................................................................................... 57
Table 2-16. Definitions of AUXADC channels ....................................................................................... 59
Table 2-17. AUXADC specifications ...................................................................................................... 59
Table 2-18. Clock squarer specifications .............................................................................................. 60
Table 2-19. ARMCA7PLL specifications................................................................................................ 63
Table 2-20. ARMCA17PLL specifications.............................................................................................. 63
Table 2-21. MAINPLL specifications ..................................................................................................... 63
Table 2-22. MMPLL specifications ........................................................................................................ 64
Table 2-23. UNIVPLL specifications ...................................................................................................... 64
Table 2-24. MSDCPLL specifications .................................................................................................... 65
Table 2-25. MDPLL1 specifications ....................................................................................................... 65
Table 2-26. MDPLL2 specifications ....................................................................................................... 66
Table 2-27. LTEWPLL specifications ..................................................................................................... 66
Table 2-28. LTEWHPLL specifications .................................................................................................. 66
Table 2-29. CR4PLL specifications ....................................................................................................... 67
Table 2-30. VENCPLL specifications .................................................................................................... 67
Table 2-31. TVDPLL specifications ....................................................................................................... 68
Table 2-32. CR4PLL2 specifications ..................................................................................................... 68
Table 2-33. OGTWPLL specifications ................................................................................................... 68
Table 2-34. LTEDSPPLL specifications ................................................................................................. 69
Table 2-35. MPLL specifications ........................................................................................................... 69
Table 2-36. APLL1 specifications .......................................................................................................... 69
MEDIATEK CONFIDENTIAL
FOR Zhi.chen@ tcl.com USE ONLY
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