计算机组成与设计 RISCV

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RISCV 参考文档,The good news is that an open instruction set that adheres closely to the RISC principles has recently debuted, and it is rapidly gaining a following. RISC-V, which was developed originally at UC Berkeley, not only cleans up the quirks of the MIPS instruction set, but it offers a simple, elegant, modern take on what instruction sets should look like in 2017
Andrew S Waterman SiFive, Inc. Yunsup ee SiFive, inc ADDITIONAL CONTRIBUTIONS BY Perry Alexander The university of Kansas Peter L. Ashenden ashenden designs pty ltd Jason D. Bakos University of South carolina Javier Diaz bruguera Universidade de santiago de compostela Jichuan Chang Google Matthew Farrens University of California, davis David Kali Northeastern University Nicole Kaiyan University of adelaide David Kirk NVIDIA Zachary Kurma Grand valley state Universit James r Larus School of computer and communications Science at EPFL Jacob Leverich Stanford University Kevin lim Hewlett-Packard Eric love University of California, Berkeley John Nickolls NVIDIA 4 John Y. Oliver Cal Poly san luis obispo Milos pryulovic Georgia Tech Partha Ranganathan Google Mark Smotherman Clemson universit AN M< MORGAN KAUFMANN PUBLISHERS ELSEVIER AN IMPRINT OF ELSEVIER elsevier. com Table of contents Title page In Praise of Computer organization and Design: The Hardware/Software Interface Copyright Dedication Acknowledgments reface About this book About the other book Why risc-v for This edition? Changes for the Fifth edition Instructor Support Concluding remarks Acknowledgments 1. Computer Abstractions and Technology Abstract 1.1 Introduction 1.2 Eight Great Ideas in Computer Architecture 1.3 Below Your program 1.4 Under the covers 1.5 Technologies for Building Processors and Memory 1.6 Performance 1.7 The Power wall 1.8 The Sea Change: The Switch from Uniprocessors to Multiprocessors 1.9 Real Stuff: Benchmarking the Intel Core i7 1. 10 Fallacies and pitfalls 1.11 Concluding Remarks Historical Perspective and further reading 1.12 Historical Perspective and Further Reading 1.13 Exercises 2. Instructions: Language of the computer Abstract 2.1 Introduction 2.2 Operations of the Computer Hardware 2.3 Operands of the Computer Hardware 2. 4 Signed and Unsigned Numbers 2.5 Representing Instructions in the Computer 2.6 Logical Operations 2.7 Instructions for Making decisions 2.8 Supporting Procedures in Computer Hardware 2.9 Communicating with People 2. 10 RISC-V Addressing for Wide Immediates and Addresses 2.11 Parallelism and Instructions: Synchronization 2. 12 Translating and Starting a Program 2.13 AC Sort Example to Put it All Together 2. 14 Arrays versus Pointers Advanced Material: Compiling C and Interpreting Java 2. 15 Advanced Material: Compiling C and Interpreting Java 2. 16 Real Stuff: miPs Instructions 2. 17 Real stuff: x86 Instructions 2. 18 Real stuff: The rest of the risc- Instruction set 2. 19 Fallacies and Pitfalls 2.20 Concluding Remarks Historical Perspective and Further Reading 2. 22 Historical Perspective and Further Reading 2.22 Exercises 3. Arithmetic for Computers Abstract 3. 1 Introduction 3.2 Addition and Subtraction 3.3 Multiplication 3, 4 Division 3.5 Floating Point 3.6 Parallelism and computer Arithmetic: Subword Parallelism 3.7 Real Stuff: Streaming sIMd Extensions and Advanced vector Eⅹ tensions in×86 3.8 Going Faster: Subword Parallelism and Matrix Multiply 3.9 Fallacies and pitfalls 3.10 Concluding Remarks Historical Perspective and Further Reading Historical Perspective and further reading 3.12 Exercises 4. The Processor Abstract 4.1 Introduction 4.2 Logic Design Conventions 4.3 Building a Datapath 4.4 A Simple Implementation Scheme 4.5 An Overview of Pipelining 4.6 Pipelined datapath and Control 4.7 Data Hazards: Forwarding versus stalling 4.8 Control hazards 4.9 Exceptions 4.10 Parallelism via Instructions 4.11 Real Stuff: The ARM Cortex-A53 and Intel Core i7 Pipelines 4.12 Going Faster: Instruction-Level Parallelism and Matrix Multiply Advanced Topic: An Introduction to Digital design using a hardware Design Language to Describe and Model a Pipeline and More Pipelining Illustrations 4.13 Advanced Topic: An Introduction to Digital Design Using a Hardware Design Language to describe and model a pipeline and More Pipelining Illustrations 4.14 Fallacies and pitfalls 4.15 Concluding Remarks Historical Perspective and Further Reading 4.16 Historical Perspective and Further Reading 4.17 Exercises 5. Large and Fast: Exploiting Memory Hierarchy Abstract 5. 1 Introduction 5.2 Memory Technologies 5.3 The Basics of caches 5. 4 Measuring and Improving cache performance 5.5 Dependable Memory Hierarchy 5.6 Virtual machines 5.7 Virtual Memory 5. 8 A Common Framework for Memory Hierarch 5. 9 Using a finite-State Machine to Control a simple cache 5.10 Parallelism and Memory Hierarchy: Cache Coherence Parallelism and Memory Hierarchy: Redundant Arrays of Inexpensive Disks 10

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weixin_42899116 想下中文版的别被骗了,这是英文版
2021-03-28
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