RTL8380M/RTL8382M/RTL8382L
Datasheet
18-Port & 28-Port & 26-Port 10/100/1000M Switch Controllers iv Track ID: Rev. 0.
6.5.11.
GPIO Interface Pins........................................................................................................................................35
6.5.12.
EJTAG Interface Pins......................................................................................................................................36
6.5.13.
Configuration Strapping Pins..........................................................................................................................36
6.5.14.
Miscellaneous Interface Pins...........................................................................................................................37
6.5.15.
Power and GND Pins ......................................................................................................................................38
7.
PIN ASSIGNMENTS AND DESCRIPTION (RTL8382L)...........................................................................................39
7.1.
P
IN
A
SSIGNMENTS
F
IGURE
(RTL8382L) ...................................................................................................................39
7.2.
P
ACKAGE
I
DENTIFICATION
.........................................................................................................................................40
7.3.
P
IN
A
SSIGNMENTS
T
ABLE
C
ODES
(RTL8382L).........................................................................................................40
7.4.
P
IN
A
SSIGNMENTS
T
ABLE
(RTL8382L).....................................................................................................................40
7.5.
P
IN
D
ESCRIPTIONS
(RTL8382L)................................................................................................................................44
7.5.1.
1000M Ethernet PHY MDI Interface Pins............................................................................................................44
7.5.2.
SGMII Interface Pins............................................................................................................................................46
7.5.3.
QSGMII Interface Pins.........................................................................................................................................46
7.5.4.
1000Base-X/100Base-FX Interface Pins..............................................................................................................46
7.5.5.
Master Mode-SPI Flash Interface Pins................................................................................................................47
7.5.6.
UART Interface Pins.............................................................................................................................................47
7.5.7.
LED Interface Pins...............................................................................................................................................47
7.5.8.
GPIO Interface Pins.............................................................................................................................................48
7.5.9.
Configuration Strapping Pins...............................................................................................................................48
7.5.10.
Miscellaneous Interface Pins...........................................................................................................................49
7.5.11.
Power and GND Pins ......................................................................................................................................50
8.
SWITCH FUNCTION DESCRIPTION.........................................................................................................................51
8.1.
H
ARDWARE
R
ESET AND
S
OFTWARE
R
ESET
................................................................................................................51
8.1.1.
Hardware Reset....................................................................................................................................................51
8.1.2.
Software Reset......................................................................................................................................................51
8.2.
C
RYSTAL
....................................................................................................................................................................51
8.3.
IEEE
802.3
AZ
E
NERGY
E
FFICIENT
E
THERNET
(EEE) ................................................................................................51
8.4.
L
AYER
2
L
EARNING AND
F
ORWARDING
.....................................................................................................................52
8.4.1.
Forwarding...........................................................................................................................................................52
8.4.2.
Learning ...............................................................................................................................................................52
8.4.3.
DA/SA Block.........................................................................................................................................................52
8.5.
PORT ISOLATION ........................................................................................................................................................53
8.6.
IEEE
802.3
X
F
LOW
C
ONTROL
...................................................................................................................................54
8.7.
H
ALF
D
UPLEX
B
ACKPRESSURE
..................................................................................................................................55
8.7.1.
Collision-Based Backpressure (Jam Mode) .........................................................................................................55
8.7.2.
Carrier-Based Backpressure (I.e., Defer Mode) ..................................................................................................55
8.8.
L
AYER
2
M
ULTICAST AND
IP
M
ULTICAST
.................................................................................................................56
8.9.
IEEE
802.1
D
/1
W
/1
S
(STP/RSTP/MSTP)...................................................................................................................56
8.10.
IEEE
802.1
P AND
IEEE
802.1Q
(VLAN) ..................................................................................................................57
8.11.
IEEE
802.1X
(N
ETWORK
A
CCESS
C
ONTROL
)............................................................................................................58
8.12.
R
ESERVED
M
ULTICAST
A
DDRESS
H
ANDLING
............................................................................................................59
8.13.
L
AYER
2
T
RAFFIC
S
UPPRESSION
(S
TORM
C
ONTROL
) .................................................................................................60
8.14.
PIE
(P
ACKET
I
NSPECTION
E
NGINE
)............................................................................................................................60
8.14.1.
Ingress ACL.....................................................................................................................................................60
8.15.
I
NPUT
B
ANDWIDTH
C
ONTROL AND
ACL
T
RAFFIC
M
ETER
.........................................................................................61
8.15.1.
Input Bandwidth Control.................................................................................................................................61
8.15.2.
ACL Traffic Meter............................................................................................................................................61
8.16.
IEEE
802.3
AD
L
INK
A
GGREGATION
P
ROTOCOL
........................................................................................................61
8.17.
IEEE
802.1
AD
VLAN
S
TACKING
...............................................................................................................................62
8.18.
Q
UALITY OF
S
ERVICE
(Q
O
S)......................................................................................................................................63
8.19.
P
ACKET
S
CHEDULING
(WRR
AND
WFQ)...................................................................................................................64
8.20.
P
ACKET
D
ROP
A
LGORITHM
(TD)...............................................................................................................................65
评论0
最新资源