目 录
1 前言............................................................................................................................1
1.1 设计背景..........................................................................................................1
1.2 设计概述..........................................................................................................1
1.3 设计内容..........................................................................................................2
2 FPGA 设计简介 .........................................................................................................3
2.1 FPGA 简介 .......................................................................................................3
2.2 FPGA 设计流程简介 .......................................................................................5
3 MATLAB 设计简介 ...................................................................................................8
3.1 MATLAB 简介 .................................................................................................8
3.2 MATLAB GUI 设计简介...............................................................................10
4 改进的快速中值滤波算法的设计与 MATLAB 仿真 ...........................................11
4.1 中值滤波算法概述.........................................................................................11
4.2 改进的快速中值滤波算法原理....................................................................12
4.3 改进的快速中值滤波算法的 MATLAB 仿真 .............................................14
5 总体设计..................................................................................................................16
5.1 总体设计概述................................................................................................16
5.2 MATLAB GUI 设计概述...............................................................................16
5.3 FPGA 设计概述 .............................................................................................17
6 模块设计..................................................................................................................18
6.1 FPGA 顶层模块设计 .....................................................................................18
6.2 UART 模块设计.............................................................................................20
6.2.1 串行接口通信协议简介......................................................................20
6.2.2 UART 顶层模块设计...........................................................................24
6.2.3 baud_rate_set 模块设计 .......................................................................26
6.2.4 transfer 模块设计 .................................................................................26
6.2.5 receiver 模块设计.................................................................................28
6.3 win3_3 模块设计............................................................................................30
6.3.1 win3_3 顶层模块设计..........................................................................31
6.3.2 generate_win3_3 模块设计..................................................................33
6.3.3 win3_3_controller 模块的设计............................................................38
6.4 fast_med 模块设计.........................................................................................40
6.5 xmit_FIFO 模块设计......................................................................................42
