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This book makes powerful Field Programmable Gate Array (FPGA) and reconfigurable technology accessible to software engineers by covering different state-of-the-art high-level synthesis approaches (e.g., OpenCL and several C-to-gates compilers). It introduces FPGA technology, its programming model, a
Dirk Koch· Frank hannig· Daniel ziener Editors FPGAs for Software Programmers ② Springer editors Dirk Koch Frank hannig The university of manchester Friedrich-Alexander-Universitat Manchester United Kingdom Erlangen-Nuirnberg(FAU) Erlangen germany Daniel ziener Friedrich-Alexander-Universit Erlangen-Niirnberg(FAU) Erlangen, Germany ISBN978-3-31926406-6 ISBN978-3-319-26408-0( e Book) DOI10.1007/978-3-319-26408-0 Library of Congress Control Number: 2015957420 Springer Cham Heidelberg New York dordrecht londo O Springer International Publishing Switzerland 2016 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use The publisher, the authors and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, express or implied, with respect to the material contained herein or for any errors or omissions that may have been made Printed on acid-free pap Springer International Publishing AG Switzerland is part of Springer Science+Business Media(www springer. com) Preface FPGAS What? Field programmable gate arrays that are cool programmable chips I see! Programmable. Great I have programming skills So, this should be an easy task for me Well, not really but i can help you Dear valued reader when software engineers and hardware engineers talk about FPGAS, often two worlds are clashing together, each with different mindsets, skill and expectations. Until recently, FPGa programming was mostly a hardware engi neering discipline carried out by specially trained people. The design productivity of FPGA design was rather low, and for the time a hardware engineer was fiddling out a few dipping bits a software engineer might have implemented his new large-scale cloud service application running on a big data center. Please note that we wrote was rather low! Like the widespread success of the processor took off with the development of expressive languages and corresponding compilers, this is currently happening for FPGAs. For decades, FPGa programming was carried out at very low abstraction levels(comparable to assembly language), but during recent years several compilers have emerged that can bring an algorithm to an FPGA at a quality far beyond what human handcrafting would be able to do. currently the software and hardware worlds are strongly converging. Software is going parallel, which has a long tradition in hardware design and vice versa, hardware gets more and more designed from expressive languages. This book aims at closing the gap between these two worlds Instead of following a programming model that is tailored to CPUs(following the so-called von Neumann computer architecture model), FPGA programming can be considered rather as molding the liquid silicon [IBE+ 10] to create a certain desired functionality, and FPGas allow computing without processors [Sin11 Preface This gives an engineer full control over the machine itself and not only over the program a machine runs. For example, if we want to perform DNA sequencing Then, let us build a reconfigurable processor which is tailored to small alphabet string matching and achieve 395 million base pairs per second throughput [ALJ 15 Or we need fast AES encryption? Then build a custom compute accelerator on an FPGA, and get 260 Gbps throughput [SS15]. As a reference, the fastest Intel Core 17 Extreme Edition i7-980X CPU does not even yield that memory throughput, and this processor provides three times less aes throughput when using all 12 cores and despite having special hardware support for AES. And if we take an i7 Extreme Edition 975x without AeS hardware support the FPga would be 52 times faster Please note that the Fpga delivers its AEs throughput on one problem, while the software solutions provide only high aggregated performance for AES on different problems On the same problem, the FPGa will be significantly faster. And not only that the FPga is much faster, it will do the job at a fraction of the power consumption Does implementing AES for an FPGA Sound too complicated? Well, tuning the performance for AES on, for example, a gPu(that is optimized for floating-point number-crunching instead of bit-level operations) is likely to be harder, will still be slower than an FPga implementation and would burn at least an order of magnitude more power. So why not getting it right in the first place? This is what this book wants to help with For making this happen, this book brings together leading experts from the industry and academia across the globe to cover Theoretical foundations and background on computer architectures, program ming models, and hardware compilation techniques(throughout the first three chapters Programming languages and compilers for FPGAs from a rather practical point of view with various case studies. This includes six state-of-the-art and emerg ing commercial approaches (located in Part I, beginning at page 61) as well as three established academic compilers (located in Part Il, beginning at page 173) This shall demonstrate that there is a large ecosystem for FPGA programming that software engineers can choose from to find the best language and compiler environment for virtually any given problem FPGA runtime environments are needed for building complex systems and for running and managing them. This provides a higher abstraction in the system allowing to focus more on applications while abstracting from many low-level details of the underlying FPGa hardware(as covered in Part Ill, beginning at page 225 Ready-to-go approaches allow building a complex system on a chip(Soc) and using pre-implemented programmable architectures on an FPGA without any need for hardware programming(as revealed in Part IV, starting from page 259) With all this, we intend making reconfigurable FPGa technology more acces sible to software programmers and to moderate between hardware and software Preface VIl engineers. FPGA technology provides maybe the most promising answer for improving performance and energy efficiency of computers at the end of CMOs scaling. To make this happen, it will need hardware and software engineers working harmonically together. Let us start with this today This book is written for software engineers who want to know more about FPGas and how to use them. Consequently, we do not assume any hardware engineering background. In a few cases, where further background information is provided this book is using terms that are common in computer engineering (e. g ,"flip fop")and compiler construction ( e. g, "scheduling")that might not be thoroughly introduced but that are assumed to be clear from the context for most readers This was done by intention as we do not want to fill the book with all possible background information while eventually hiding the big picture, which is what are FPGAs good for and how can they be programmed and used by software engineers Such sections should be seen as optional and should not be seen as essential when reading this book. Those terms are also nicely presented on wikipedia, if further explanation might be needed. In addition to software engineers, this book can also serve as a textbook in university courses on alternative programming approaches and acceleration techniques. finally, this book is also relevant for hardware engineers who want to get an overview on how to enhance design productivity with latest languages and tools We thank all the chapter authors for their outstanding contributions, their feedback, and their will to compile a comprehensive textbook targeting software engineers We also thank springer especially charles glaser for his encouragement to develop this book and Hemalatha Gunasekaran for her support. Furthermore, we thank mikel Lujan for his feedback and suggestions to improve this book. Finall we thank Philippa Ordnung for providing the Index. All editor's and author's profit of the book sales will be donated to the United Nations Childrens Fund ( UNICEF) Manchester UK Dirk Koch Erlangen, Germany Frank hannig Erlangen. German Daniel ziener VIl Preface Contributors Michael adler C14 Intel Corporation, VSSAD Group, Hudson, MA, USA Andreas agne C13 University of Paderborn, Paderborn, Germany Stephan Ahrends C 4 National Instruments, Munich, Germany Jason Anderson Department of Electrical and Computer Engineering, University of Toronto Toronto on. Canada Hugo A Andrade C 4 National Instruments, Berkeley, CA, USA Oriol Arcas.Abella c 9 Barcelona Supercomputing Center, Barcelona, Spain; Universitat Politecnica de Catalunya, Barcelona, Spain Tobias becker C5 Maxeler Technologies, London, UK Stephen Brown Department of Electrical and Computer Engineering, University of toronto, Toronto. on. canada Andrew canis Department of Electrical and Computer Engineering, University of Toronto, Toronto. on. canada Joao M. P Cardoso C2 University of Porto, Faculty of Engineering, Porto, Portugal INESC-TEC, Porto, Portugal Yu Ting Chen C10 Department of Electrical and Computer Engineering, University of toronto, Toronto. on. Canada Jongsok Choi C10 Department of Electrical and Computer Engineering, University of toronto, Toronto. on. canada Jason Cong c8 Falcon Computing Solutions, Inc. Los Angeles, CA, USA; Computer Science Department, University of California, Los Angeles, CA, USA Preface Adrian cristal C7 Barcelona Supercomputing Center, Barcelona, Spain Centro Superior de Investigaciones Cientificas (IIIA-CSIC), Barcelona, Spain Universitat Politecnica de Catalunya, Barcelona, Spain Kermin Fleming C14 Intel Corporation, VSSAD Group, Hudson, MA, USA Blair fort C10 Department of Electrical and Computer Engineering, University of toronto Toronto on. Canada Georgi Gaydadjiev C5 Maxeler Technologies, London, UK Jeffrey Goeders C10C15 Department of Electrical and Computer Engineering, University of British Columbia. Vancouver BC. Canada Robert j. Halstead C11 University of California. Riverside. CA. uSa Frank Hannig C1 C3 C7 C12 Friedrich-Alexander-Universitat Erlangen-Nurnberg(FAU), Erlangen, Germany Markus Happe C13 ETH Zurich. Zurich Switzerland Simon Hogg C 4 National Instruments. Austin. TX. USA Graham M. holland C15 School of Engineering Science, Simon Fraser University, Burnaby, BC, Canada Hsuan hsiao C10 Department of Electrical and Computer Engineering, University of Toronto, Toronto. on. Canada Yuhuan huang c8 Falcon Computing Solutions, Inc. Los Angeles, CA, USA Dirk Koch C1 The university of manchester, manchester, UK Ruo long lian Department of Electrical and Computer Engineering, University of toronto, Toronto oN. Canada Cheng liu Department of Electrical and Electronic Engineering, University of Hong Kong, Pokfulam, Hong Kong

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