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Verilog电梯设计（FPGA代码）
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2019-02-27
16:00:52
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Verilog电梯设计（FPGA代码） （183个子文件） 
elaborate.bat 917B compile.bat 840B simulate.bat 807B runme.bat 229B runme.bat 229B tb_elevator.bit 2.09MB xsim_1.c 5KB xsim.dbg 8KB tb_elevator_routed.dcp 262KB tb_elevator_placed.dcp 227KB tb_elevator_opt.dcp 179KB tb_elevator.dcp 75KB
xsimk.exe 89KB
usage_statistics_webtalk.html 31KB .xsim_webtallk.info 64B xsimSettings.ini 735B xsim.ini 40B vivado_13100.backup.jou 5KB vivado_2028.backup.jou 3KB vivado_19216.backup.jou 2KB vivado_15828.backup.jou 1KB vivado_5192.backup.jou 1KB webtalk_17616.backup.jou 717B webtalk.jou 717B vivado.jou 684B vivado_20392.backup.jou 684B vivado.jou 679B vivado.jou 654B ISEWrap.js 7KB ISEWrap.js 7KB rundef.js 1KB rundef.js 1KB vivado_2028.backup.log 53KB runme.log 39KB vivado_13100.backup.log 33KB runme.log 22KB vivado_19216.backup.log 14KB vivado_15828.backup.log 5KB vivado_5192.backup.log 4KB vivado.log 1KB elaborate.log 926B webtalk_17616.backup.log 832B webtalk.log 832B xvlog.log 400B compile.log 400B xsimkernel.log 330B simulate.log 50B xsimcrash.log 0B dianti.lpr 343B xsim.mem 4KB xsim_0.win64.obj 34KB xsim_1.win64.obj 3KB fsm_encoding.os 214B vivado.pb 66KB place_design.pb 11KB route_design.pb 11KB opt_design.pb 7KB write_bitstream.pb 3KB init_design.pb 2KB xelab.pb 2KB xvlog.pb 746B tb_elevator_power_summary_routed.pb 722B tb_elevator_utilization_placed.pb 242B tb_elevator_utilization_synth.pb 242B vivado.pb 149B tb_elevator_methodology_drc_routed.pb 53B tb_elevator_route_status.pb 44B tb_elevator_drc_routed.pb 37B tb_elevator_drc_opted.pb 37B tb_elevator_vlog.prj 233B xsim.reloc 1KB xsim.rlx 842B xil_defaultlib.rlx 239B tb_elevator_io_placed.rpt 77KB tb_elevator_methodology_drc_routed.rpt 34KB tb_elevator_clock_utilization_routed.rpt 17KB tb_elevator_utilization_placed.rpt 9KB tb_elevator_power_routed.rpt 8KB tb_elevator_timing_summary_routed.rpt 7KB tb_elevator_utilization_synth.rpt 7KB tb_elevator_control_sets_placed.rpt 4KB tb_elevator_drc_routed.rpt 2KB tb_elevator_drc_opted.rpt 2KB tb_elevator_route_status.rpt 588B tb_elevator_power_routed.rpx 129KB tb_elevator_methodology_drc_routed.rpx 54KB tb_elevator_timing_summary_routed.rpx 26KB tb_elevator_drc_routed.rpx 2KB tb_elevator_drc_opted.rpx 2KB .init_design.begin.rst 181B .opt_design.begin.rst 181B .place_design.begin.rst 181B .route_design.begin.rst 181B .write_bitstream.begin.rst 181B .vivado.begin.rst 180B .vivado.begin.rst 180B .route_design.end.rst 0B .place_design.end.rst 0B .vivado.end.rst 0B .vivado.end.rst 0B共 183 条
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