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Computer Organization and Design - The Hardware Software

Interface [RISC-V Edition] Solution Manual

Computer Organization (St. Francis Xavier University)

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Computer Organization and Design - The Hardware Software

Interface [RISC-V Edition] Solution Manual

Computer Organization (St. Francis Xavier University)

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Chapter 1 Solutions S-3

1.1 Personal computer (includes workstation and laptop): Personal computers

emphasize delivery of good performance to single users at low cost and usually

execute third-party so ware.

Personal mobile device (PMD, includes tablets): PMDs are battery operated

with wireless connectivity to the Internet and typically cost hundreds of

dollars, and, like PCs, users can download so ware (“apps”) to run on them.

Unlike PCs, they no longer have a keyboard and mouse, and are more likely

to rely on a touch-sensitive screen or even speech input.

Server: Computer used to run large problems and usually accessed via a

network.

Warehouse-scale computer:  ousands of processors forming a large cluster.

Supercomputer: Computer composed of hundreds to thousands of processors

and terabytes of memory.

Embedded computer: Computer designed to run one application or one set

of related applications and integrated into a single system.

1.2

a. Performance via Pipelining

b. Dependability via Redundancy

c. Performance via Prediction

d. M a k e t h e C o m m o n C a s e F a s t

e. Hierarchy of Memories

f. Performance via Parallelism

g. Design for Moore’s Law

h. Use Abstraction to Simplify Design

1.3  e program is compiled into an assembly language program, which is then

assembled into a machine language program.

1.4

a. 1280 × 1024 pixels = 1,310,720 pixels = > 1,310,720 × 3 = 3,932,160 bytes/

frame.

b. 3,932,160 bytes × (8 bits/byte) /100E6 bits/second = 0.31 seconds

1.5

a. performance of P1 (instructions/sec) = 3

× 10

/1.5 = 2 × 10

performance of P2 (instructions/sec) = 2.5 × 10

/1.0 = 2.5 × 10

performance of P3 (instructions/sec) = 4 × 10

/2.2 = 1.8 × 10

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S-4 Chapter 1 Solutions

b. cycles(P1) = 10 × 3 × 10

= 30 × 10

cycles(P2) = 10 × 2.5 × 10

= 25 × 10

cycles(P3) = 10 × 4 × 10

= 40 × 10

c. No. instructions(P1) = 30 × 10

/1.5 = 20 × 10

No. instructions(P2) = 25 × 10

/1 = 25 × 10

No. instructions(P3) = 40 × 10

/2.2 = 18.18 × 10

CPI

new

= CPI

old

× 1.2, then CPI(P1) = 1.8, CPI(P2) = 1.2, CPI(P3) = 2.6

f = No. instr. × CPI/time, then

f (P1) = 20 × 10

× 1.8/7 = 5.14 GHz

f (P2) = 25 × 10

× 1.2/7 = 4.28 GHz

f (P1) = 18.18 × 10

× 2.6/7 = 6.75 GHz

1.6

a. Class A: 10

instr. Class B: 2 × 10

instr. Class C: 5 × 10

instr. Class D: 2 × 10

instr.

Time = No. instr. × CPI/clock rate

Total time P1 = (10

+ 2 × 10

× 2 + 5 × 10

× 3 + 2 × 10

× 3)/(2.5 × 10

) =

10.4 × 10

−4

Total time P2 = (10

× 2 + 2 × 10

× 2 + 5 × 10

× 2 + 2 × 10

× 2)/(3 × 10

) =

6.66 × 10

−4

CPI(P1) = 10.4 × 10

−4

× 2.5 × 10

/10

= 2.6

CPI(P2) = 6.66 × 10

−4

× 3 × 10

/10

= 2.0

b. clock cycles(P1) = 10

× 1 + 2 × 10

× 2 + 5 × 10

× 3 + 2 × 10

× 3 = 26 × 10

clock cycles(P2) = 10

× 2 + 2 × 10

× 2 + 5 × 10

× 2 + 2 × 10

× 2 = 20 × 10

1.7

a. C P I = T

exec

× f/No. instr.

Compiler A CPI = 1.1

Compiler B CPI = 1.25

b. f

= (No. instr.(B) × CPI(B))/(No. instr.(A) × CPI(A)) = 1.37

c. T

new

= 1.67

new

= 2.27

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