SystemVerilog Assertions and Functional Coverage_ Guide to Language

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Ashok B. Mehta (auth.) - SystemVerilog Assertions and Functional Coverage_ Guide to Language, Methodology and Applications-Springer International Publishing (2016)
ashok b mehta System verilog assertions and Functional Coverage Guide to Language, Methodology and applications Second edition 空 Springer ashok b. mehta LoS Gatos. ca USA Additionalmaterialtothisbookcanbedownloadedfromhttp:extrasspringer.com ISBN978-3-319-30538-7 ISBN978-3-319-305394( e Book) DOI10.10071978-3-319-30539-4 Library of Congress Control Number: 2016932750 o Springer International Publishing Switzerland 2014, 2016 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use The publisher, the authors and the editors are safe to assume that the advice and information in this book are believed to be true and accurate at the date of publication. Neither the publisher nor the authors or the editors give a warranty, express or implied, with respect to the material contained herein or for any errors or omissions that may have been made Printed on acid-free paper This springer imprint is published by springer Nature The registered company is Springer International Publishing AG Switzerland My dear wife ashraf zahedi and My dear parents Rukshamani and biren mehta Foreword Louis h. sullivan. an american architect. considered the father of the modern skyscraper, and mentor to Frank Lloyd Wright, coined the phrase 'form follows function. The actual quote is form ever follows function,which is a bit more poetic and assertive than the version that has found its way into the common vernacular. He wrote those words in an article written for Lippincott's magazine #57 published in March 1896. Here is the passage in that article that contains the famous quote Whether it be the sweeping eagle in his light or the open apple-blossom, then toiling work horse, the blithe swan the branching oak, the winding stream at its base the drifting clouds- over all the coursing sun form ever follows function and this is the law where function does not change form does not change. The granite rocks, the ever brooding hills, remain for ages lightning lives, comes into shape, and dies, in a twinkling It is the pervading law of all things organic and inorganic, of all things physical and metaphysical, of all things human and all things superhuman--of all true manifestations of the head, of the heart, of the soul--that the life is recognizable in its expression, that form ever follows function This is the law Earlier in the article, Sullivan foreshadows his thought with this passage All things in nature have a shape, that is to say, a form, an outward semblance, that tells us what they are, that distinguishes them from ourselves and from each other The precise meaning of this pithy phrase has been debated in art and architecture circles since Sullivan's article was first published. However, it is widely accepted to mean that the form of something--its shape, color, size, etc.is related to what it does. Water flows, rocks sit, and birds fly. In his book The Design of Everyday Things, '(Basic Books 1988) Don Norman discusses a similar concept, the notion of affordances. Norman defines the term as the perceived and actual properties of the thing, primarily those fundamental properties that determine just how the thing could possibly be used. He cites some examples: ' A chair affords("is for?")support and, therefore, affords sitting. A chair VI Foreword can also be carried. Glass is for seeing through, and for breaking. Wood is normally used for solidity, opacity, support or carving orman's idea turns Sullivans upside down. He is saying function follows form. The shape, color, size, etc, of an object affects what it does. Nonetheless both men would likely agree that form and function, whichever drives the other, are inextricably linked Software designers have the luxury of choosing the form to fit the function. The are not as constrained by the laws of physics as say, a cabinetmaker. The cabi netmaker must choose materials that will not only look nice but will withstand the weight of books or dishes or whatever is to be placed on the shelves. Software designers have some constraints with regard to memory space and processing time, but beyond that they have a lot of freedom to build whatever comes to mind Sullivan referred to all things physical and metaphysical. Without much of a stretch, we can interpret that to include software a most abstract human creation The form of a piece of software is linked to its function. The complex software that verification engineers build, called a testbench, must be designed before it can be built. The verification engineer, like an architect, must determine the form of his creation The architecture space is wide open. Computer code, while much more abstract than say, a staircase or a door handle on a car, has a form and a function. The form of computer code is the set of syntactic elements strung together in a program. The function is what the program does when executed, often referred to as its semantics A verification engineer is typically presented a set of requirements, often as a design specification, and asked to build a testbench that meets these requirements Because of the tremendous fexibility afforded by the software medium he must choose the form carefully to ensure that not only meets the requirements, but is easy to use. reusable, and robust. he must choose a form that fits the function Often an assertion is just the right thing to capture the essence of some part of a design. The form of an assertion is short sequence of text that can be inserted easily without disrupting the design. With their compact syntax and concise semantics, assertions can be used to check low-level invariants, protocols, or end-to-end behavior The function of an assertion, in a simulation context, is to assert that something is always (or never) the case. It ensures that invariants are indeed invariant Assertions can operate as checkers or as coverpoints. The fact that they can be included in-line in RtL code or in separate checkers and that they can be short or long for simple or complex checking makes them invaluable in any testbenc The wise verification engineer uses all the tools as his disposal to create an effective and easy- to-use testbench he will consider the function of the testbench and devise a form that suits the required function. assertions are an important part of any testbench Ashok mehta has written a book that makes assertions accessible. His approach is very pragmatic, choosing to show you how to build and use assertions rather than engage in a lot of theoretical discussion Not that theoretical discussion is irrelevant it is useful to understand the theoretical underpinnings of any technology However there are many other books on that topic. This book fills a gap for practicing engineers where before no text provided the how-tos of building and using assertions in a real-world context Ashok opens up the world of assertions to verification engineers who may have thought them too opaque to consider using in a real testbench. He cially nice job of deconstructing assertions to show how they work and how to write them. Through detailed examples, he shows all the pieces that go into creating assertions of different kinds, and how they fit together. Ashok completes the picture by demonstrating how assertions and coverage fit together Part of the book is devoted to functional coverage. he deconstructs the some times awkward System Verilog syntax of covergoups and coverpoints Like he has with assertions, he takes the mystery out of building a high-quality coverage model With the mysteries of assertions unmasked, you can now include them in your personal vocabulary of testbench forms. This will enable you to create testbenches with more sophisticated function February 2013 Mark glasser Preface to the Second edition The first edition of this book was well received, and the readers provided many a good suggestion on further elaboration of language semantics. Readers also pointed out some errata on the language syntax. I am greatly indebted to the readers and colleagues for their input and support. In addition, the IEEE 1800-2012 LRM came along. Many features of the 2012 LRM were missing in the first edition, since the LRM was not ready yet. This edition incorporates the errata/suggestions from readers as well as the IEeE 1800-2012 feature set. Among many, features such as checkers, let declarations, past and future global clock sampled value functions strong and weak properties, abort properties, and. triggered end point detection method are included. Furthermore, this edition adds many more examples and adds further clarification of the semantic nuances of the language Pleasant reading Preface to the first edition Having been an end user of eda tools for over 20 years, I have seen that many new technologies stay on wayside because either the engineers do not have time to learn these new technologies/languages or the available material is too complex to digest a few years back i decided to tackle this problem by creating a very practical, application-oriented down-to-earth System Verilog Assertions(SVA)and functional coverage(FC) class for professional engineers. The class was well received, and I received a lot of feedback on making the class even more useful. That culminated i over 500 slides of class material just on SVA and FC. Many suggested that I had collected enough material for a book. That is how i ended up on this project with the same goal that the reader should understand the concept clearly in an easy and intuitive manner and be able to apply the concepts to real-life applications right The style of the book is such that the concepts are clarified directly in a slide style diagram with talking points. This will hopefully make it easy to use the book as a quick reference as well. Applications immediately following a topic will further clarify the subject matter, and my hope is that once you understand the semantics and applications of a given topic, you are ready to apply that to your daily design work. These applications are modeled such that you should be able to use them in your design with minimal modifications This book is meant for both design and verification engineers. As a matter of fact, I have devoted a complete section on the reasons and practicality behind having micro-level assertions written by the design engineers and macro-level assertions written by verification engineers. Gone are the days when designers would write rtl and throw it over the wall for the verification engineer to quality check The book covers both ieee 1800-2005 and ieee 1800-2009/2012 standard SⅤ A language. Chapter I is introduction to SVA and FC giving a brief history of Sva evo lution. It also explains how sva and fc fall under System verilog umbrella to provide a complete assertions and functional coverage-driven methodology

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