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BQ2415

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VREF

33 nF

BOOT

PACK–

PACK+

CSOUT

SCL

SDA

CSOUT

CSIN

PGND

C BUS

VAUX

HOST

SCL

SDA

STAT

VREF

STAT

PMID

VBUS

BUS

BOOT

OTG

SNS

CSIN

BAT

1 Fm

4.7 Fm

10 kW

L 1.0 H

22 Fm

0.1 Fm

1 Fm

bq24157

33 Fm

OTG

10 kW

bq24157

www.ti.com

SLUSB80 –SEPTEMBER 2012

Fully Integrated Switch-Mode Charger

With USB Compliance and USB-OTG Support

Check for Samples: bq24157

FEATURES

• Power Up System without Battery

• Synchronous Fixed-Frequency PWM

Controller Operating at 3 MHz With 0% to

• Charge Faster than Linear Chargers

99.5% Duty Cycle

• High-Accuracy Voltage and Current Regulation

• Automatic High Impedance Mode for Low

– Input Current Regulation Accuracy: ±5%

Power Consumption

(100 mA and 500 mA)

• Robust Protection

– Charge Voltage Regulation Accuracy:

– Reverse Leakage Protection Prevents

±0.5% (25°C), ±1% (0°C to 125°C)

Battery Drainage

– Charge Current Regulation Accuracy: ±5%

– Thermal Regulation and Protection

• Input Voltage Based Dynamic Power

– Input/Output Overvoltage Protection

Management (VIN DPM)

• Status Output for Charging and Faults

• Bad Adaptor Detection and Rejection

• USB Friendly Boot-Up Sequence

• Safety Limit Register for Maximum Charge

Voltage and Current Limiting • Automatic Charging

• High-Efficiency Mini-USB/AC Battery Charger • Boost Mode Operation for USB OTG

for Single-Cell Li-Ion and Li-Polymer Battery

– Input Voltage Range (from Battery): 3.2 V to

Packs

4.5 V

• 20-V Absolute Maximum Input Voltage Rating

• 2.1 mm x 2 mm 20-Pin WCSP Package

• 6.5-V Maximum Operating Input Voltage

APPLICATIONS

• Built-In Input Current Sensing and Limiting

• Mobile and Smart Phones

• Integrated Power FETs for Up To 1.25-A

Charge Rate

• MP3 Players

• Programmable Charge Parameters through

• Handheld Devices

C™ Compatible Interface (up to 3.4 Mbps):

Figure 1. Typical Application Circuit

– Input Current Limit

– VIN DPM Threshold

– Fast-Charge/Termination Current

– Charge Regulation Voltage (3.5 V to 4.44 V)

– Low Charge Current Mode Enable/Disable

– Termination Enable/Disable

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2NanoFree is a trademark of Texas Instruments.

C is a trademark of NXP B.V. Corporation.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

捷多邦，您值得信赖的PCB打样专家！

bq24157

SLUSB80 –SEPTEMBER 2012

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

DESCRIPTION

The bq24157 is a compact, flexible, high-efficiency, USB-friendly switch-mode charge management device for

single-cell Li-ion and Li-polymer batteries used in a wide range of portable applications. The charge parameters

can be programmed through an I

C interface. The IC integrates a synchronous PWM controller, power

MOSFETs, input current sensing, high-accuracy current and voltage regulation, and charge termination, into a

small WCSP package.

The IC charges the battery in three phases: conditioning, constant current and constant voltage. The input

current is automatically limited to the value set by the host. Charge is terminated based on battery voltage and

user-selectable minimum current level. A safety timer with reset control provides a safety backup for I

interface. During normal operation, The IC automatically restarts the charge cycle if the battery voltage falls

below an internal threshold and automatically enters sleep mode or high impedance mode when the input supply

is removed. The charge status can be reported to the host using the I

C interface. During the charging process,

the IC monitors its junction temperature (T

) and reduces the charge current once T

increases to about 125°C.

To support USB OTG device, bq24157 can provide VBUS (5.05V) by boosting the battery voltage. The IC is

available in 20-pin WCSP package.

DEVICE SPINS AND COMPARISONS

PART NUMBER bq24157

VOVP (V) 6.5

D4 Pin Definition OTG

CHARGE(MAX)

at POR in default mode with R

(SNS)

= 68 mΩ and OTG=High on bq24157(mA) 325

CHARGE(MAX)

in HOST mode with R

(SNS)

= 68 mΩ and Safety Limit Register increased from default (A) 1.25

Output regulation voltage at POR (V) 3.54

Boost Function Yes

100mA (OTG=LOW);

Input Current Limit in Default Mode

500mA (OTG=High)

Battery Detection at Power Up No

I2C Address 6AH

PN1 (bit4 of 03H) 1

PN0 (bit3 of 03H) 0

Safety Timer and WD Timer Disabled

100 ms Power Up Delay No

Product Folder Links :bq24157

PMID

PGND

PMID

PGND

PMID

PGND

STAT

SDA

OTG

VBUS

BOOT

SCL

CSIN

VREF

CSOUT

bq24157

(Top View)

bq24157

www.ti.com

SLUSB80 –SEPTEMBER 2012

PIN LAYOUT (20-Bump YFF Package)

PIN FUNCTIONS

I/O DESCRIPTION

NAME NO.

Battery voltage and current sense input. Bypass it with a ceramic capacitor (minimum 0.1 μF) to PGND if there are

CSOUT E4 I

long inductive leads to battery.

Charger input voltage. Bypass it with a 1-μF ceramic capacitor from VBUS to PGND. It also provides power to the

VBUS A1, A2 I/O

load during boost mode .

Connection point between reverse blocking FET and high-side switching FET. Bypass it with a minimum of 3.3-μF

PMID B1, B2, B3 I/O

capacitor from PMID to PGND.

SW C1, C2, C3 O Internal switch to output inductor connection.

Bootstrap capacitor connection for the high-side FET gate driver. Connect a 10-nF ceramic capacitor (voltage rating ≥

BOOT A3 I/O

10 V) from BOOT pin to SW pin.

PGND D1, D2, D3 Power ground

Charge current-sense input. Battery current is sensed across an external sense resistor. A 0.1-μF ceramic capacitor

CSIN E1 I

to PGND is required.

SCL A4 I

C interface clock. Connect a 10-kΩ pullup resistor to 1.8V rail (V

AUX

= V

CC_HOST

)

SDA B4 I/O

C interface data. Connect a 10-kΩ pullup resistor to 1.8V rail (V

AUX

= V

CC_HOST

)

Charge status pin. Pull low when charge in progress. Open drain for other conditions. During faults, a 128-μs pulse is

STAT C4 O sent out. STAT pin can be disabled by the EN_STAT bit in control register. STAT can be used to drive a LED or

communicate with a host processor.

Internal bias regulator voltage. Connect a 1µF ceramic capacitor from this output to PGND. External load on VREF is

VREF E3 O

not recommended.

Charge disable control pin. CD=0, charge is enabled. CD=1, charge is disabled and VBUS pin is high impedance to

CD E2 I

GND.

Boost mode enable control or input current limiting selection pin. When OTG is in active status, the device is forced to

operate in boost mode. It has higher priority over I

C control and can be disabled using the control register. At POR

OTG D4 I

while in default mode, the OTG pin is used as the input current limiting selection pin. The I

C register is ignored at

startup. When OTG=High, I

IN_LIMIT

= 500mA and when OTG = Low, I

IN_LIMIT

= 100mA.

ORDERING INFORMATION

(1)

PART NUMBER MARKING MEDIUM QUANTITY

bq24157YFFR bq24157A Tape and Reel 3000

bq24157YFFT bq24157A Tape and Reel 250

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

Product Folder Links :bq24157

bq24157

SLUSB80 –SEPTEMBER 2012

www.ti.com

ABSOLUTE MAXIMUM RATINGS

(1) (2)

over operating free-air temperature range (unless otherwise noted)

bq24157 UNIT

Supply voltage range (with respect to PGND

(3)

) VBUS; V

PMID

≥ V

BUS

–0.3 V –2 to 20 V

SCL, SDA, OTG, SLRST, CSIN, CSOUT,

Input voltage range (with respect to PGND

(3)

) –0.3 to 7 V

PMID, STAT –0.3 to 20 V

Output voltage range (with respect to PGND

(3)

) VREF 7 V

SW, BOOT –0.7 to 20 V

Voltage difference between CSIN and CSOUT inputs (V

(CSIN)

– V

(CSOUT)

) ±7 V

Voltage difference between BOOT and SW inputs (V

(BOOT)

– V

(SW)

) -0.3 to 7 V

Voltage difference between VBUS and PMID inputs (V

(VBUS)

– V

(PMID)

) -7 to 0.7 V

Voltage difference between PMID and SW inputs (V

(PMID)

– V

(SW)

) -0.7 to 20 V

Output sink STAT 10 mA

Output Current (average) SW 1.55

(2)

Operating free-air temperature range –30 to 85 °C

Junction temperature –40 to 125 °C

stg

Storage temperature –45 to 150 °C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage

values are with respect to the network ground terminal unless otherwise noted.

(2) Duty cycle for output current should be less than 50% for 10- year life time when output current is above 1.25A.

(3) All voltages are with respect to PGND if not specified. Currents are positive into, negative out of the specified terminal, if not specified.

Consult Packaging Section of the data sheet for thermal limitations and considerations of packages.

THERMAL INFORMATION

bq24157

THERMAL METRIC

(1)

UNITS

YFF (20 PINS)

Junction-to-ambient thermal resistance 85

JCtop

Junction-to-case (top) thermal resistance 25

Junction-to-board thermal resistance 55

°C/W

Junction-to-top characterization parameter 4

Junction-to-board characterization parameter 50

JCbot

Junction-to-case (bottom) thermal resistance n/a

spacer

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

RECOMMENDED OPERATING CONDITIONS

MIN NOM MAX UNIT

BUS

Supply voltage, bq24157 4 6

(1)

Operating junction temperature range –40 125 °C

(1) The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the BOOST or SW pins. A tight

layout minimizes switching noise.

Product Folder Links :bq24157

bq24157

www.ti.com

SLUSB80 –SEPTEMBER 2012

ELECTRICAL CHARACTERISTICS

Circuit of Figure 2, VBUS = 5 V, HZ_MODE = 0, OPA_MODE = 0 (CD = 0), T

= –40°C to 125°C, T

= 25°C for typical values

(unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

INPUT CURRENTS

VBUS > VBUS(min), PWM switching 10 mA

(VBUS)

VBUS supply current control VBUS > VBUS(min), PWM NOT switching 5

0°C < T

< 85°C, CD=1 or HZ_MODE=1 15 23 μA

0°C < T

< 85°C, V

(CSOUT)

= 4.2 V,

lgk

Leakage current from battery to VBUS pin 5 μA

High Impedance mode, VBUS = 0 V

0°C < T

< 85°C, V

(CSOUT)

= 4.2 V,

Battery discharge current in High Impedance

High Impedance mode, V = 0 V, SCL, SDA, 23 μA

mode, (CSIN, CSOUT, SW pins)

OTG = 0 V or 1.8 V

VOLTAGE REGULATION

(OREG)

Output regulation voltage programable range Operating in voltage regulation, programmable 3.5 4.44 V

= 25°C –0.5% 0.5%

Voltage regulation accuracy

–1% 1%

CURRENT REGULATION (FAST CHARGE)

(LOWV)

≤ V

(CSOUT)

< V

(OREG)

O(CHARGE)

Output charge current programmable range VBUS > V

(SLP)

, R

(SNS)

= 68 mΩ, LOW_CHG=0, 550 1250 mA

Programmable

LOWV

≤ V

CSOUT

< V

OREG

, VBUS >V

SLP

, R

SNS

= 68

Low charge current mΩ, 325 350 mA

LOW_CHG=1, OTG=High

Regulation accuracy of the voltage across R

(SNS)

37.4 mV ≤ V

(IREG)

< 44.2mV –3.5% 3.5%

(for charge current regulation)

44.2 mV ≤ V

(IREG)

-3% 3%

(IREG)

= I

O(CHARGE)

× R

(SNS)

WEAK BATTERY DETECTION

(LOWV)

Weak battery voltage threshold programmable 3.4 3.7 V

Adjustable using I

C control

range

2(1)

Weak battery voltage accuracy –5% 5%

Hysteresis for V

(LOWV)

Battery voltage falling 100 mV

Deglitch time for weak battery threshold Rising voltage, 2-mV over drive, t

RISE

= 100 ns 30 ms

CD, OTG and SLRST PIN LOGIC LEVEL

Input low threshold level 0.4 V

Input high threshold level 1.3 V

(bias)

Input bias current Voltage on control pin is 5 V 1.0 µA

CHARGE TERMINATION DETECTION

Termination charge current programmable range V

(CSOUT)

> V

(OREG)

– V

(RCH)

, VBUS > V

(SLP)

, mA

(TERM)

50 400

(SNS)

= 68 mΩ, Programmable

Deglitch time for charge termination Both rising and falling, 2-mV overdrive,

30 ms

RISE

, t

FALL

= 100 ns

3.4 mV ≤ V

(IREG_TERM)

≤ 6.8 mV –15% 15%

Regulation accuracy for termination current

across R

(SNS)

6.8 mV < V

(IREG_TERM)

≤ 17 mV –10% 10%

(IREG_TERM)

= I

O(TERM)

× R

(SNS)

17 mV < V

(IREG_TERM)

≤ 27.2 mV –5.5% 5.5%

(1) While in 15-min mode, if a battery that is charged to a voltage higher than this voltage is inserted, the charger enters Hi-Z mode and

awaits I

C commands.

Product Folder Links :bq24157

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