《深入浅出AVR单片机》光盘资料资源-CSDN文库

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深入浅出AVR

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《深入浅出AVR单片机》光盘资料（1214个子文件）

HD_Support._c 8KB

HD_Support._c 7KB

HD_Support._c 5KB

EX_Support._c 5KB

EX_Support._c 4KB

System._c 3KB

PF_Config._c 3KB

PROC_Config._c 3KB

System._c 2KB

RD_Serial_Buffer._c 2KB

PF_Config._c 1KB

Timer_reload._c 330B

RD_UseAVRPortBit._h 15KB

RD_ADT_QUEUE._h 7KB

RD_Serial_Buffer._h 5KB

LIB_Config._h 3KB

PF_Config._h 3KB

LIB_Config._h 3KB

PF_Config._h 3KB

LIB_Config._h 2KB

HD_Support._h 2KB

EX_Support._h 2KB

PROC_Config._h 2KB

a1.a 5KB

11.a 2KB

渐明渐暗的灯_cof.aps 3KB

矩阵键盘_cof.aps 3KB

BOOT_cof.aps 2KB

Timer_0_cof.aps 2KB

test_cof.aps 2KB

端口扩展_cof.aps 2KB

BOOT_cof.aps 2KB

a1.asm 21KB

11.asm 19KB

Module_Function.bas 3KB

Module_Function.bas 2KB

Module_E13.bas 85B

Black.bmp 2KB

Red.bmp 2KB

RD_DispBoard_595.c 27KB

RD_LCD1602B.c 17KB

EX_Support.c 16KB

RD_UseMsgFrame.c 16KB

RD_UseTWI.c 16KB

RD_UseKey.c 11KB

RD_UseSerialBuff.c 11KB

RD_UseSerialFrame_PROC.c 11KB

EX_Support.c 11KB

RD_UseDelay.c 9KB

KeyDis_Drv.c 9KB

HD_Support.c 8KB

EX_Support.c 8KB

HD_Support.c 8KB

RD_ADT_QUEUE.c 7KB

HD_Support.c 7KB

RD_ADT_QUEUE.c 7KB

HD_Support.c 7KB

RD_MallocEx.c 7KB

HD_Support.c 7KB

EX_Support.c 6KB

HD_Support.c 6KB

RD_UseLED_Flash_CTR.c 6KB

boot.c 6KB

System.c 6KB

HD_Support.c 6KB

EX_Support.c 6KB

boot.c 6KB

RD_UseCooperatingMiniOs.c 6KB

HD_Support.c 6KB

HD_Support.c 5KB

EX_Support.c 5KB

HD_Support.c 5KB

共 1214 条

8-bit

Microcontrollers

Application Note

Rev. 2595A-AVR-03/05

AVR107: Interfacing AVR serial memories

Features

• Devices: AT25128A/256A, AT25F1024/2048/4096

• Full Serial Memory Functions Support

• Memory Array Burst Read

• Page Burst Write

• Write Protection Detection

• On Going Access Detection

• Non-blocking Write Access

• Access Status Information

1 Introduction

Serial-interface memories are used in a broad spectrum of consumer, automotive,

telecommunication, medical, industrial and PC related markets. Primarily used to

store personal preference data and configuration/setup data, Serial memories are

the most flexible type of non-volatile memory utilized today. Compared to other

NVM solutions, serial memories devices offer a lower pin count, smaller packages,

lower voltages, as well as lower power consumption.

Most of the AVR provide a SPI interface which enables a connection with a serial

memory like the AT25128A/256A and AT25F1024/2048/4096.

To ease and accelerate the integration of SPI serial memories in customer’s AVR

systems, basic drivers were developed to efficiently access them. This application

note describes the functionality and the architecture of these drivers as well as the

motivation of the selected solution. The exhaustive list and description of the

provided functions are part of the Doxygen Automated Document.

Figure 1-1. Hardware connections

AVR with SPI interface

SCK

MOSI

MISO

#SS

Serial memory

(AT25xxxx or AT25Fxxxx)

SCK

#CS

#HOLD

#WP

Manual

switch

Vcc

AVR107

2595A-AVR-03/05

2 Serial memories

The following sections describe connecting the memory to an AVR processor,

memory access types, block write protection bits and busy detection. For more

information refer to the data sheets.

2.1 Serial Memory to AVR Hardware Connection

The SPI interface is configured in the master mode. The SCK and MOSI ports are

outputs and the MISO port is an input. Refer to Figure 1-1.

Note that in this application note we use the slave select signal #SS to control the

chip select pin #CS of the serial memory. This requires taking some precautions

during the initialization of the SPI interface (see Initialization of the SPI Interface).

Another port such as PB2 could be used to control the chip select line.

The #HOLD signal can be held high in its inactive state because the SPI interface

always halts the clock if the data not valid.

The user can choose the configuration of the write protect signal #WP.

Note: EEPROMs operating voltage range from 1,8V to 5,5V whereas Flashes

operates from 2,7V to 3,6V.

2.2 SPI Serial Memory Access Types

In order to understand the structure of the proposed drivers, it is worth to review the

different accesses to the serial memories.

All accesses follow this sequence:

1. The chip select line is driven low.

2. A number of serialized bytes are sent or received synchronously to the SCK clock

on the data lines.

3. The chip select line is driven high.

The number and value of the serialized byte depends on the access type.

The SPI memory devices of this application note both support the SPI mode 0(0,0)

and mode 3 (1,1). In the proposed driver the mode 0 is selected (See serial memory

datasheets for details).

2.2.1 Single Byte Write Commands: WREN, WRDI, CHIP ERASE

These accesses are one byte long. Only the instruction byte (later on called

“op_code”) instruction is sent on the MOSI data line.

AVR107

2595A-AVR-03/05

Figure 2-1. Example WREN Timing

2.2.2 Read/ Write Status Register: RDSR/WRSR

These accesses access are 2-byte long: The op_code byte is followed by the byte to

be written (WRSR) or to be read (RDSR).

Note: The Write Status Register operation must be preceded by WREN command.

Figure 2-2. WRSR Timing

AVR107

2595A-AVR-03/05

Figure 2-3. RDSR Timing

2.2.3 Sector Erase Command (only for AT25Fxxx Devices)

This access consists of a one-byte op_code and 3 address bytes.

Note: The Sector Erase operation must be preceded by WREN command.

Figure 2-4. Sector Erase Timing

2.2.4 Data Write and Data Read Accesses

These accesses consist of a one-byte op_code followed by an address phase (2-byte

long for the AT25xxx devices, 3-byte long for the AT25Fxxx devices) and a data

phase. The data phase length depends on the number of bytes to be written or read.

In case of a full memory array read, the number of bytes is the capacity in bytes of the

memory.

Note: The WRITE and PROGRAM operations must be preceded by WREN

command.

AVR107

2595A-AVR-03/05

Figure 2-5. WRITE command Timing (AT25xxxx)

Figure 2-6. PROGRAM command Timing (AT25Fxxxx).

2.2.5 Access Type Summary

The following table summarises the access types and their related lengths:

Table 2-1. Access Type Summary Table

Command Op_code Address Phase Length (bytes) Data Phase Length (bytes)

AT25xxxx AT25Fxxxx MOSI line MISO line

WREN 0000 X110 0 0 0 0

WRDI 0000 X100 0 0 0 0

RDSR 0000 X101 0 0 0 1

WRSR 0000 X001 0 0 1 0

READ 0000 X011 2 3 0 1 to array size

WRITE 0000 X010 2 N/A

(1)

1 to page size 0

PROGRAM 0000 X010 N/A

(1)

3 1 to page size 0

SECTOR ERASE 0101 X110 N/A

(1)

3 0 0

CHIP ERASE 0110 X110 N/A

(1)

0 0 0

RDID 0001 X101 N/A

(1)

0 0 2

Notes:

1. Command not applicable for this device.

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LincolnDean

2017-05-28

内容很棒很好
ttljh

2015-10-01

终于找到这个光盘资料了,不容易啊.
photoshopcs100

2014-09-28

资料是对的，好评
看云听雨

2017-08-07

找到了，可有点和我的原来的有出入
jeffy_cf

2014-09-11

不错，有用的

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