In Praise of Computer Organization and Design: e Hardware/
Soware Interface
“Textbook selection is oen a frustrating act of compromise—pedagogy, content
coverage, quality of exposition, level of rigor, cost. Computer Organization and
Design is the rare book that hits all the right notes across the board, without
compromise. It is not only the premier computer organization textbook, it is a
shining example of what all computer science textbooks could and should be.”
—Michael Goldweber, Xavier University
“I have been using Computer Organization and Design for years, from the very rst
edition. is new edition is yet another outstanding improvement on an already
classic text. e evolution from desktop computing to mobile computing to Big
Data brings new coverage of embedded processors such as the ARM, new material
on how soware and hardware interact to increase performance, and cloud
computing. All this without sacricing the fundamentals.”
—Ed Harcourt, St. Lawrence University
“To Millennials: Computer Organization and Design is the computer architecture
book you should keep on your (virtual) bookshelf. e book is both old and new,
because it develops venerable principles—Moore’s Law, abstraction, common case
fast, redundancy, memory hierarchies, parallelism, and pipelining—but illustrates
them with contemporary designs.”
—Mark D. Hill, University of Wisconsin-Madison
“e new edition of Computer Organization and Design keeps pace with advances
in emerging embedded and many-core (GPU) systems, where tablets and
smartphones will/are quickly becoming our new desktops. is text acknowledges
these changes, but continues to provide a rich foundation of the fundamentals
in computer organization and design which will be needed for the designers of
hardware and soware that power this new class of devices and systems.”
—Dave Kaeli, Northeastern University
“Computer Organization and Design provides more than an introduction to computer
architecture. It prepares the reader for the changes necessary to meet the ever-
increasing performance needs of mobile systems and big data processing at a time
that diculties in semiconductor scaling are making all systems power constrained.
In this new era for computing, hardware and soware must be co-designed and
system-level architecture is as critical as component-level optimizations.”
—Christos Kozyrakis, Stanford University
“Patterson and Hennessy brilliantly address the issues in ever-changing computer
hardware architectures, emphasizing on interactions among hardware and soware
components at various abstraction levels. By interspersing I/O and parallelism concepts
with a variety of mechanisms in hardware and soware throughout the book, the new
edition achieves an excellent holistic presentation of computer architecture for the post-
PC era. is book is an essential guide to hardware and soware professionals facing
energy eciency and parallelization challenges in Tablet PC to Cloud computing.”
—Jae C. Oh, Syracuse University
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RISC-V EDITION
Computer Organization and Design
THE HARDWARE/SOFTWARE INTERFACE
David A. Patterson is the Pardee Professor of Computer Science, Emeritus at the
University of California at Berkeley, which he joined aer graduating from UCLA in
1977. His teaching has been honored by the Distinguished Teaching Award from the
University of California, the Karlstrom Award from ACM, and the Mulligan Education
Medal and Undergraduate Teaching Award from IEEE. Patterson received the IEEE
Technical Achievement Award and the ACM Eckert-Mauchly Award for contributions
to RISC, and he shared the IEEE Johnson Information Storage Award for contributions
to RAID. He also shared the IEEE John von Neumann Medal and the C & C Prize
with John Hennessy. Like his coauthor, Patterson is a Fellow of the American Academy
of Arts and Sciences, the Computer History Museum, ACM, and IEEE, and he was
elected to the National Academy of Engineering, the National Academy of Sciences,
and the Silicon Valley Engineering Hall of Fame. He served on the Information
Technology Advisory Committee to the US President, as chair of the CS division in the
Berkeley EECS department, as chair of the Computing Research Association, and as
President of ACM. is record led to Distinguished Service Awards from ACM, CRA,
and SIGARCH.
At Berkeley, Patterson led the design and implementation of RISC I, likely the rst
VLSI reduced instruction set computer, and the foundation of the commercial SPARC
architecture. He was a leader of the Redundant Arrays of Inexpensive Disks (RAID) project,
which led to dependable storage systems from many companies. He was also involved in the
Network of Workstations (NOW) project, which led to cluster technology used by Internet
companies and later to cloud computing. ese projects earned four dissertation awards
from ACM. His current research projects are Algorithm-Machine-People and Algorithms
and Specializers for Provably Optimal Implementations with Resilience and Eciency. e
AMP Lab is developing scalable machine learning algorithms, warehouse-scale-computer-
friendly programming models, and crowd-sourcing tools to gain valuable insights quickly
from big data in the cloud. e ASPIRE Lab uses deep hardware and soware co-tuning
to achieve the highest possible performance and energy eciency for mobile and rack
computing systems.
John L. Hennessy is a Professor of Electrical Engineering and Computer Science at
Stanford University, where he has been a member of the faculty since 1977 and was,
from 2000 to 2016, its tenth President. Hennessy is a Fellow of the IEEE and ACM; a
member of the National Academy of Engineering, the National Academy of Science,
and the American Philosophical Society; and a Fellow of the American Academy of
Arts and Sciences. Among his many awards are the 2001 Eckert-Mauchly Award for
his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering
Award, and the 2000 John von Neumann Award, which he shared with David Patterson.
He has also received seven honorary doctorates.
In 1981, he started the MIPS project at Stanford with a handful of graduate students.
Aer completing the project in 1984, he took a leave from the university to cofound
MIPS Computer Systems (now MIPS Technologies), which developed one of the rst
commercial RISC microprocessors. As of 2006, over 2 billion MIPS microprocessors have
been shipped in devices ranging from video games and palmtop computers to laser printers
and network switches. Hennessy subsequently led the DASH (Director Architecture
for Shared Memory) project, which prototyped the rst scalable cache coherent
multiprocessor; many of the key ideas have been adopted in modern multiprocessors.
In addition to his technical activities and university responsibilities, he has continued to
work with numerous start-ups, both as an early-stage advisor and an investor.
