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2.2.5 Decreasing V
CORE
for Power Optimization ..................................................................... 69
2.2.6 LPM3.5, LPM4.5 .................................................................................................. 69
2.2.7 Brownout Reset (BOR), Software BOR, Software POR ..................................................... 69
2.2.8 SVS/SVM Performance Modes and Wakeup Times ......................................................... 69
2.2.9 PMM Interrupts ................................................................................................... 71
2.2.10 Port I/O Control .................................................................................................. 71
2.2.11 Supply Voltage Monitor Output (SVMOUT, Optional) ...................................................... 71
2.3 PMM Registers ............................................................................................................ 72
3 Battery Backup System ...................................................................................................... 79
3.1 Battery Backup Introduction .............................................................................................. 80
3.2 Battery Backup Operation ................................................................................................ 80
3.2.1 Battery Backup Switch Control ................................................................................. 81
3.2.2 LPMx.5 and Backup Operation ................................................................................. 82
3.2.3 Resistive Charger ................................................................................................ 82
3.3 Battery Backup Registers ................................................................................................ 83
4 Unified Clock System (UCS) ................................................................................................ 85
4.1 Unified Clock System (UCS) Introduction .............................................................................. 86
4.2 UCS Operation ............................................................................................................. 88
4.2.1 UCS Module Features for Low-Power Applications .......................................................... 88
4.2.2 Internal Very-Low-Power Low-Frequency Oscillator (VLO) ................................................. 88
4.2.3 Internal Trimmed Low-Frequency Reference Oscillator (REFO) ........................................... 89
4.2.4 XT1 Oscillator ..................................................................................................... 89
4.2.5 XT2 Oscillator ..................................................................................................... 90
4.2.6 Digitally-Controlled Oscillator (DCO) ........................................................................... 91
4.2.7 Frequency Locked Loop (FLL) .................................................................................. 91
4.2.8 DCO Modulator ................................................................................................... 92
4.2.9 Disabling FLL Hardware and Modulator ....................................................................... 93
4.2.10 FLL Operation From Low-Power Modes ..................................................................... 93
4.2.11 Operation From Low-Power Modes, Requested by Peripheral Modules ................................ 93
4.2.12 UCS Module Fail-Safe Operation ............................................................................. 95
4.2.13 Synchronization of Clock Signals ............................................................................. 97
4.3 Module Oscillator (MODOSC) ........................................................................................... 98
4.3.1 MODOSC Operation ............................................................................................. 98
4.4 UCS Module Registers ................................................................................................... 99
5 CPUX .............................................................................................................................. 109
5.1 MSP430X CPU (CPUX) Introduction .................................................................................. 110
5.2 Interrupts .................................................................................................................. 112
5.3 CPU Registers ............................................................................................................ 113
5.3.1 Program Counter (PC) ......................................................................................... 113
5.3.2 Stack Pointer (SP) .............................................................................................. 113
5.3.3 Status Register (SR) ............................................................................................ 115
5.3.4 Constant Generator Registers (CG1 and CG2) ............................................................. 116
5.3.5 General-Purpose Registers (R4 –R15) ...................................................................... 117
5.4 Addressing Modes ....................................................................................................... 119
5.4.1 Register Mode ................................................................................................... 120
5.4.2 Indexed Mode ................................................................................................... 121
5.4.3 Symbolic Mode .................................................................................................. 125
5.4.4 Absolute Mode .................................................................................................. 130
5.4.5 Indirect Register Mode ......................................................................................... 132
5.4.6 Indirect Autoincrement Mode .................................................................................. 133
5.4.7 Immediate Mode ................................................................................................ 134
5.5 MSP430 and MSP430X Instructions .................................................................................. 136
5.5.1 MSP430 Instructions ............................................................................................ 136
4
Contents SLAU208H–June 2008–Revised December 2010
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Vigor-Chen2014-10-20因为学校SRTP，给我很大帮助
