/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*
Title: Memories implementation
*/
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
#include <board.h>
#include <pio/pio.h>
/*
Macros:
READ - Reads a register value. Useful to add trace information to read
accesses.
WRITE - Writes data in a register. Useful to add trace information to
write accesses.
*/
#define READ(peripheral, register) (peripheral->register)
#define WRITE(peripheral, register, value) (peripheral->register = value)
//------------------------------------------------------------------------------
// Internal functions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Exported functions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// Changes the mapping of the chip so that the remap area mirrors the
/// internal ROM or the EBI CS0.
//------------------------------------------------------------------------------
void BOARD_RemapRom()
{
WRITE(AT91C_BASE_MATRIX, MATRIX_MRCR, 0);
}
//------------------------------------------------------------------------------
/// Changes the mapping of the chip so that the remap area mirrors the
/// internal RAM.
//------------------------------------------------------------------------------
void BOARD_RemapRam()
{
WRITE(AT91C_BASE_MATRIX,
MATRIX_MRCR,
(AT91C_MATRIX_RCA926I | AT91C_MATRIX_RCA926D));
}
//------------------------------------------------------------------------------
/// Initialize and configure the SDRAM
//------------------------------------------------------------------------------
void BOARD_ConfigureSdram(unsigned char busWidth)
{
volatile unsigned int i;
static const Pin pinsSdram = PINS_SDRAM;
volatile unsigned int *pSdram = (unsigned int *) AT91C_EBI_SDRAM;
unsigned short sdrc_dbw = 0;
switch (busWidth) {
case 16:
sdrc_dbw = AT91C_SDRAMC_DBW_16_BITS;
break;
case 32:
default:
sdrc_dbw = AT91C_SDRAMC_DBW_32_BITS;
break;
}
// Enable corresponding PIOs
PIO_Configure(&pinsSdram, 1);
// Enable EBI chip select for the SDRAM, VDDIOMSEL set: memories are 3.3V powered
WRITE(AT91C_BASE_MATRIX, MATRIX_EBI, AT91C_MATRIX_CS1A_SDRAMC | (1 << 16));
// CFG Control Register
WRITE(AT91C_BASE_SDRAMC, SDRAMC_CR, AT91C_SDRAMC_NC_9
| AT91C_SDRAMC_NR_13
| AT91C_SDRAMC_CAS_2
| AT91C_SDRAMC_NB_4_BANKS
| sdrc_dbw
| AT91C_SDRAMC_TWR_2
| AT91C_SDRAMC_TRC_7
| AT91C_SDRAMC_TRP_2
| AT91C_SDRAMC_TRCD_2
| AT91C_SDRAMC_TRAS_5
| AT91C_SDRAMC_TXSR_8);
for (i = 0; i < 1000; i++);
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_NOP_CMD); // Perform NOP
pSdram[0] = 0x00000000;
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_PRCGALL_CMD); // Set PRCHG AL
pSdram[0] = 0x00000000; // Perform PRCHG
for (i = 0; i < 10000; i++);
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_RFSH_CMD); // Set 1st CBR
pSdram[1] = 0x00000001; // Perform CBR
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_RFSH_CMD); // Set 2 CBR
pSdram[2] = 0x00000002; // Perform CBR
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_RFSH_CMD); // Set 3 CBR
pSdram[3] = 0x00000003; // Perform CBR
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_RFSH_CMD); // Set 4 CBR
pSdram[4] = 0x00000004; // Perform CBR
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_RFSH_CMD); // Set 5 CBR
pSdram[5] = 0x00000005; // Perform CBR
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_RFSH_CMD); // Set 6 CBR
pSdram[6] = 0x00000006; // Perform CBR
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_RFSH_CMD); // Set 7 CBR
pSdram[7] = 0x00000007; // Perform CBR
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_RFSH_CMD); // Set 8 CBR
pSdram[8] = 0x00000008; // Perform CBR
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_LMR_CMD); // Set LMR operation
pSdram[9] = 0xcafedede; // Perform LMR burst=1, lat=2
WRITE(AT91C_BASE_SDRAMC, SDRAMC_TR, (BOARD_MCK * 7) / 1000000); // Set Refresh Timer
WRITE(AT91C_BASE_SDRAMC, SDRAMC_MR, AT91C_SDRAMC_MODE_NORMAL_CMD); // Set Normal mode
pSdram[0] = 0x00000000; // Perform Normal mode
}
//------------------------------------------------------------------------------
/// Initialize and configure the SDRAM for a 48 MHz MCK (ROM code clock settings)
//------------------------------------------------------------------------------
void BOARD_ConfigureSdram48MHz(unsigned char busWidth)
{
volatile unsigned int i;
static const Pin pinsSdram = PINS_SDRAM;
volatile unsigned int *pSdram = (unsigned int *) AT91C_EBI_SDRAM;
unsigned short sdrc_dbw = 0;
switch (busWidth) {
case 16:
sdrc_dbw = AT91C_SDRAMC_DBW_16_BITS;
break;
case 32:
default:
sdrc_dbw = AT91C_SDRAMC_DBW_32_BITS;
break;
}
// Enable corresponding PIOs
PIO_Configure(&pinsSdram, 1);
// Enable EBI chip select for the SDRAM
WRITE(AT91C_BASE_MATRIX, MATRIX_EBI, AT91C_MATRIX_CS1A_SDRAMC | (1 << 16));
// CFG Control Register
W
没有合适的资源?快使用搜索试试~ 我知道了~
能够在keil4下运行的AT91SAM9260示例程序(含工程文件)
共102个文件
ini:25个
o:15个
h:14个
4星 · 超过85%的资源 需积分: 5 114 下载量 122 浏览量
2011-03-06
16:23:10
上传
评论 3
收藏 552KB RAR 举报
温馨提示
能够在keil4下运行的AT91SAM9260示例程序(含工程文件)原网站提供的只能在keil3下编译
资源推荐
资源详情
资源评论
收起资源包目录
能够在keil4下运行的AT91SAM9260示例程序(含工程文件) (102个子文件)
at91sam9260-sdram.axf 255KB
at91sam9260_uvopt.bak 77KB
at91sam9260_uvproj.bak 67KB
at91sam9260.Uv2.bak 11KB
at91sam9260_Uv2.Bak 11KB
at91sam9260_Opt.Bak 6KB
at91sam9260.opt.bak 6KB
at91sam9260-sdram.bin 6KB
board_memories.c 14KB
pio_it.c 14KB
main.c 13KB
pio.c 12KB
cp15.c 9KB
board_lowlevel.c 8KB
pmc.c 7KB
dbgu.c 6KB
pit.c 5KB
tc.c 5KB
led.c 5KB
aic.c 4KB
retarget.c 3KB
main.d 828B
pio_it.d 722B
pmc.d 688B
cp15.d 569B
board_lowlevel.d 458B
dbgu.d 370B
board_memories.d 363B
led.d 353B
pit.d 302B
pio.d 302B
aic.d 302B
tc.d 294B
retarget.d 206B
at91sam9260_sdram-SAM-ICE.dep 10KB
AT91SAM9260.h 299KB
board.h 23KB
trace.h 9KB
pio.h 7KB
assert.h 4KB
pio_it.h 4KB
cp15.h 3KB
dbgu.h 3KB
aic.h 3KB
pit.h 3KB
led.h 3KB
tc.h 3KB
pmc.h 2KB
board_memories.h 2KB
at91sam9260-sdram.htm 24KB
at91sam9m10-ek-ddram.ini 10KB
at91sam9260-ek-sdram.ini 10KB
at91sam9263-ek-sdram.ini 10KB
at91sam9261-ek-sdram.ini 9KB
at91sam9rl-ek-sdram.ini 9KB
at91sam7se-ek-sdram.ini 8KB
at91sam9g20-ek-sdram.ini 6KB
at91sam9260-ek-sram.ini 6KB
at91sam9261-ek-sram.ini 6KB
at91sam9rl-ek-sram.ini 5KB
at91sam9263-ek-sram.ini 5KB
at91sam9g20-ek-sram.ini 4KB
at91sam9m10-ek-sram.ini 4KB
at91sam7s-ek-sram.ini 3KB
at91sam7xc-ek-sram.ini 2KB
at91sam7se-ek-sram.ini 2KB
at91sam7x-ek-sram.ini 2KB
at91sam7a3-ek-sram.ini 2KB
JLinkArm_sdram-SAM-ICE.ini 205B
at91cap9-stk-sram.ini 0B
at91cap9-stk-sdram.ini 0B
at91cap9-dk-ddram.ini 0B
at91cap9-dk-sram.ini 0B
at91cap9-dk-bcram.ini 0B
at91cap9-dk-sdram.ini 0B
at91sam9260-sdram.lnp 863B
at91sam9260-sdram.map 55KB
at91sam9260-ek-getting-started-project.mpw 85B
main.o 135KB
pio_it.o 131KB
pmc.o 131KB
cp15.o 129KB
board_memories.o 124KB
pio.o 123KB
led.o 123KB
board_lowlevel.o 122KB
dbgu.o 122KB
pit.o 121KB
tc.o 121KB
aic.o 120KB
retarget.o 11KB
board_cstartup_keil.o 3KB
cp15_asm_keil.o 2KB
at91sam9260-sdram.plg 302B
board_cstartup_keil.s 7KB
cp15_asm_keil.s 6KB
norflash.sct 2KB
sdram.sct 2KB
sram.sct 2KB
at91sam9260-sdram.tra 2KB
共 102 条
- 1
- 2
ma666
- 粉丝: 1
- 资源: 1
上传资源 快速赚钱
- 我的内容管理 展开
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功
- 1
- 2
- 3
前往页